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-rw-r--r--configs/common/FSConfig.py24
-rw-r--r--configs/example/memtest.py4
-rw-r--r--configs/example/ruby_direct_test.py4
-rw-r--r--configs/example/ruby_mem_test.py4
-rw-r--r--configs/example/ruby_network_test.py2
-rw-r--r--configs/example/ruby_random_test.py4
-rw-r--r--configs/example/se.py2
-rw-r--r--configs/ruby/MESI_CMP_directory.py5
-rw-r--r--configs/ruby/MI_example.py5
-rw-r--r--configs/ruby/MOESI_CMP_directory.py5
-rw-r--r--configs/ruby/MOESI_CMP_token.py5
-rw-r--r--configs/ruby/MOESI_hammer.py5
-rw-r--r--configs/ruby/Network_test.py5
-rw-r--r--configs/ruby/Ruby.py7
-rw-r--r--configs/splash2/cluster.py4
-rw-r--r--configs/splash2/run.py2
16 files changed, 49 insertions, 38 deletions
diff --git a/configs/common/FSConfig.py b/configs/common/FSConfig.py
index de2d9181d..8e4be3137 100644
--- a/configs/common/FSConfig.py
+++ b/configs/common/FSConfig.py
@@ -73,7 +73,7 @@ def makeLinuxAlphaSystem(mem_mode, mdesc = None):
# base address (including the PCI config space)
self.bridge = Bridge(delay='50ns', nack_delay='4ns',
ranges = [AddrRange(IO_address_space_base, Addr.max)])
- self.physmem = PhysicalMemory(range = AddrRange(mdesc.mem()))
+ self.physmem = SimpleMemory(range = AddrRange(mdesc.mem()))
self.bridge.master = self.iobus.slave
self.bridge.slave = self.membus.master
self.physmem.port = self.membus.master
@@ -109,7 +109,7 @@ def makeLinuxAlphaRubySystem(mem_mode, mdesc = None):
ide = IdeController(disks=[Parent.disk0, Parent.disk2],
pci_func=0, pci_dev=0, pci_bus=0)
- physmem = PhysicalMemory(range = AddrRange(mdesc.mem()))
+ physmem = SimpleMemory(range = AddrRange(mdesc.mem()))
self = LinuxAlphaSystem(physmem = physmem)
if not mdesc:
# generic system
@@ -178,8 +178,10 @@ def makeSparcSystem(mem_mode, mdesc = None):
self.t1000 = T1000()
self.t1000.attachOnChipIO(self.membus)
self.t1000.attachIO(self.iobus)
- self.physmem = PhysicalMemory(range = AddrRange(Addr('1MB'), size = '64MB'), zero = True)
- self.physmem2 = PhysicalMemory(range = AddrRange(Addr('2GB'), size ='256MB'), zero = True)
+ self.physmem = SimpleMemory(range = AddrRange(Addr('1MB'), size = '64MB'),
+ zero = True)
+ self.physmem2 = SimpleMemory(range = AddrRange(Addr('2GB'), size ='256MB'),
+ zero = True)
self.bridge.master = self.iobus.slave
self.bridge.slave = self.membus.master
self.physmem.port = self.membus.master
@@ -269,8 +271,8 @@ def makeArmSystem(mem_mode, machine_type, mdesc = None, bare_metal=False):
if bare_metal:
# EOT character on UART will end the simulation
self.realview.uart.end_on_eot = True
- self.physmem = PhysicalMemory(range = AddrRange(Addr(mdesc.mem())),
- zero = True)
+ self.physmem = SimpleMemory(range = AddrRange(Addr(mdesc.mem())),
+ zero = True)
else:
self.kernel = binary('vmlinux.arm.smp.fb.2.6.38.8')
self.machine_type = machine_type
@@ -283,8 +285,10 @@ def makeArmSystem(mem_mode, machine_type, mdesc = None, bare_metal=False):
boot_flags = 'earlyprintk console=ttyAMA0 lpj=19988480 norandmaps ' + \
'rw loglevel=8 mem=%s root=/dev/sda1' % mdesc.mem()
- self.physmem = PhysicalMemory(range = AddrRange(self.realview.mem_start_addr,
- size = mdesc.mem()))
+ self.physmem = SimpleMemory(range =
+ AddrRange(self.realview.mem_start_addr,
+ size = mdesc.mem()),
+ conf_table_reported = True)
self.realview.setupBootLoader(self.membus, self, binary)
self.gic_cpu_addr = self.realview.gic.cpu_addr
self.flags_addr = self.realview.realview_io.pio_addr + 0x30
@@ -319,7 +323,7 @@ def makeLinuxMipsSystem(mem_mode, mdesc = None):
self.iobus = Bus(bus_id=0)
self.membus = MemBus(bus_id=1)
self.bridge = Bridge(delay='50ns', nack_delay='4ns')
- self.physmem = PhysicalMemory(range = AddrRange('1GB'))
+ self.physmem = SimpleMemory(range = AddrRange('1GB'))
self.bridge.master = self.iobus.slave
self.bridge.slave = self.membus.master
self.physmem.port = self.membus.master
@@ -424,7 +428,7 @@ def makeX86System(mem_mode, numCPUs = 1, mdesc = None, self = None, Ruby = False
self.mem_mode = mem_mode
# Physical memory
- self.physmem = PhysicalMemory(range = AddrRange(mdesc.mem()))
+ self.physmem = SimpleMemory(range = AddrRange(mdesc.mem()))
# Platform
self.pc = Pc()
diff --git a/configs/example/memtest.py b/configs/example/memtest.py
index 5faee1bc7..2dcccbba6 100644
--- a/configs/example/memtest.py
+++ b/configs/example/memtest.py
@@ -140,8 +140,8 @@ for scale in treespec[:-2]:
prototypes.insert(0, next)
# system simulated
-system = System(funcmem = PhysicalMemory(),
- physmem = PhysicalMemory(latency = "100ns"))
+system = System(funcmem = SimpleMemory(in_addr_map = False),
+ physmem = SimpleMemory(latency = "100ns"))
def make_level(spec, prototypes, attach_obj, attach_port):
fanout = spec[0]
diff --git a/configs/example/ruby_direct_test.py b/configs/example/ruby_direct_test.py
index 53a1b6850..f591d47ea 100644
--- a/configs/example/ruby_direct_test.py
+++ b/configs/example/ruby_direct_test.py
@@ -83,11 +83,11 @@ else:
sys.exit(1)
#
-# Create the M5 system. Note that the PhysicalMemory Object isn't
+# Create the M5 system. Note that the Memory Object isn't
# actually used by the rubytester, but is included to support the
# M5 memory size == Ruby memory size checks
#
-system = System(physmem = PhysicalMemory())
+system = System(physmem = SimpleMemory())
#
# Create the ruby random tester
diff --git a/configs/example/ruby_mem_test.py b/configs/example/ruby_mem_test.py
index 4b0948365..4d7932b77 100644
--- a/configs/example/ruby_mem_test.py
+++ b/configs/example/ruby_mem_test.py
@@ -105,8 +105,8 @@ cpus = [ MemTest(atomic = False,
for i in xrange(options.num_cpus) ]
system = System(cpu = cpus,
- funcmem = PhysicalMemory(),
- physmem = PhysicalMemory())
+ funcmem = SimpleMemory(in_addr_map = False),
+ physmem = SimpleMemory())
if options.num_dmas > 0:
dmas = [ MemTest(atomic = False,
diff --git a/configs/example/ruby_network_test.py b/configs/example/ruby_network_test.py
index 2d68a81ea..1d44813ac 100644
--- a/configs/example/ruby_network_test.py
+++ b/configs/example/ruby_network_test.py
@@ -103,7 +103,7 @@ cpus = [ NetworkTest(fixed_pkts=options.fixed_pkts,
# create the desired simulated system
system = System(cpu = cpus,
- physmem = PhysicalMemory())
+ physmem = SimpleMemory())
Ruby.create_system(options, system)
diff --git a/configs/example/ruby_random_test.py b/configs/example/ruby_random_test.py
index 11571a297..cb6a74776 100644
--- a/configs/example/ruby_random_test.py
+++ b/configs/example/ruby_random_test.py
@@ -92,11 +92,11 @@ tester = RubyTester(check_flush = check_flush,
wakeup_frequency = options.wakeup_freq)
#
-# Create the M5 system. Note that the PhysicalMemory Object isn't
+# Create the M5 system. Note that the Memory Object isn't
# actually used by the rubytester, but is included to support the
# M5 memory size == Ruby memory size checks
#
-system = System(tester = tester, physmem = PhysicalMemory())
+system = System(tester = tester, physmem = SimpleMemory())
Ruby.create_system(options, system)
diff --git a/configs/example/se.py b/configs/example/se.py
index a2f8a09dc..853947475 100644
--- a/configs/example/se.py
+++ b/configs/example/se.py
@@ -152,7 +152,7 @@ CPUClass.numThreads = numThreads;
np = options.num_cpus
system = System(cpu = [CPUClass(cpu_id=i) for i in xrange(np)],
- physmem = PhysicalMemory(range=AddrRange("512MB")),
+ physmem = SimpleMemory(range=AddrRange("512MB")),
membus = Bus(), mem_mode = test_mem_mode)
# Sanity check
diff --git a/configs/ruby/MESI_CMP_directory.py b/configs/ruby/MESI_CMP_directory.py
index 4d490705b..cd503ddc9 100644
--- a/configs/ruby/MESI_CMP_directory.py
+++ b/configs/ruby/MESI_CMP_directory.py
@@ -133,8 +133,9 @@ def create_system(options, system, piobus, dma_ports, ruby_system):
cntrl_count += 1
- phys_mem_size = long(system.physmem.range.second) - \
- long(system.physmem.range.first) + 1
+ phys_mem_size = 0
+ for mem in system.memories.unproxy(system):
+ phys_mem_size += long(mem.range.second) - long(mem.range.first) + 1
mem_module_size = phys_mem_size / options.num_dirs
for i in xrange(options.num_dirs):
diff --git a/configs/ruby/MI_example.py b/configs/ruby/MI_example.py
index 1285c4b1d..de82c38f6 100644
--- a/configs/ruby/MI_example.py
+++ b/configs/ruby/MI_example.py
@@ -104,8 +104,9 @@ def create_system(options, system, piobus, dma_ports, ruby_system):
cntrl_count += 1
- phys_mem_size = long(system.physmem.range.second) - \
- long(system.physmem.range.first) + 1
+ phys_mem_size = 0
+ for mem in system.memories.unproxy(system):
+ phys_mem_size += long(mem.range.second) - long(mem.range.first) + 1
mem_module_size = phys_mem_size / options.num_dirs
for i in xrange(options.num_dirs):
diff --git a/configs/ruby/MOESI_CMP_directory.py b/configs/ruby/MOESI_CMP_directory.py
index 5bc23ea72..10eeaf21a 100644
--- a/configs/ruby/MOESI_CMP_directory.py
+++ b/configs/ruby/MOESI_CMP_directory.py
@@ -132,8 +132,9 @@ def create_system(options, system, piobus, dma_ports, ruby_system):
cntrl_count += 1
- phys_mem_size = long(system.physmem.range.second) - \
- long(system.physmem.range.first) + 1
+ phys_mem_size = 0
+ for mem in system.memories.unproxy(system):
+ phys_mem_size += long(mem.range.second) - long(mem.range.first) + 1
mem_module_size = phys_mem_size / options.num_dirs
for i in xrange(options.num_dirs):
diff --git a/configs/ruby/MOESI_CMP_token.py b/configs/ruby/MOESI_CMP_token.py
index f621df767..4da7d7adf 100644
--- a/configs/ruby/MOESI_CMP_token.py
+++ b/configs/ruby/MOESI_CMP_token.py
@@ -155,8 +155,9 @@ def create_system(options, system, piobus, dma_ports, ruby_system):
cntrl_count += 1
- phys_mem_size = long(system.physmem.range.second) - \
- long(system.physmem.range.first) + 1
+ phys_mem_size = 0
+ for mem in system.memories.unproxy(system):
+ phys_mem_size += long(mem.range.second) - long(mem.range.first) + 1
mem_module_size = phys_mem_size / options.num_dirs
for i in xrange(options.num_dirs):
diff --git a/configs/ruby/MOESI_hammer.py b/configs/ruby/MOESI_hammer.py
index 3f9d31482..622296289 100644
--- a/configs/ruby/MOESI_hammer.py
+++ b/configs/ruby/MOESI_hammer.py
@@ -130,8 +130,9 @@ def create_system(options, system, piobus, dma_ports, ruby_system):
cntrl_count += 1
- phys_mem_size = long(system.physmem.range.second) - \
- long(system.physmem.range.first) + 1
+ phys_mem_size = 0
+ for mem in system.memories.unproxy(system):
+ phys_mem_size += long(mem.range.second) - long(mem.range.first) + 1
mem_module_size = phys_mem_size / options.num_dirs
#
diff --git a/configs/ruby/Network_test.py b/configs/ruby/Network_test.py
index ff07c6b4d..b84fabde6 100644
--- a/configs/ruby/Network_test.py
+++ b/configs/ruby/Network_test.py
@@ -105,8 +105,9 @@ def create_system(options, system, piobus, dma_ports, ruby_system):
cntrl_count += 1
- phys_mem_size = long(system.physmem.range.second) - \
- long(system.physmem.range.first) + 1
+ phys_mem_size = 0
+ for mem in system.memories.unproxy(system):
+ phys_mem_size += long(mem.range.second) - long(mem.range.first) + 1
mem_module_size = phys_mem_size / options.num_dirs
for i in xrange(options.num_dirs):
diff --git a/configs/ruby/Ruby.py b/configs/ruby/Ruby.py
index 1911a1eb7..046797a3c 100644
--- a/configs/ruby/Ruby.py
+++ b/configs/ruby/Ruby.py
@@ -172,9 +172,10 @@ def create_system(options, system, piobus = None, dma_ports = []):
total_mem_size.value += dir_cntrl.directory.size.value
dir_cntrl.directory.numa_high_bit = numa_bit
- physmem_size = long(system.physmem.range.second) - \
- long(system.physmem.range.first) + 1
- assert(total_mem_size.value == physmem_size)
+ phys_mem_size = 0
+ for mem in system.memories.unproxy(system):
+ phys_mem_size += long(mem.range.second) - long(mem.range.first) + 1
+ assert(total_mem_size.value == phys_mem_size)
ruby_profiler = RubyProfiler(ruby_system = ruby,
num_of_sequencers = len(cpu_sequencers))
diff --git a/configs/splash2/cluster.py b/configs/splash2/cluster.py
index a6244a9ef..dd8ab784a 100644
--- a/configs/splash2/cluster.py
+++ b/configs/splash2/cluster.py
@@ -211,8 +211,8 @@ else:
# ----------------------
# Create a system, and add system wide objects
# ----------------------
-system = System(cpu = all_cpus, l1_ = all_l1s, l1bus_ = all_l1buses, physmem = PhysicalMemory(),
- membus = Bus(clock = busFrequency))
+system = System(cpu = all_cpus, l1_ = all_l1s, l1bus_ = all_l1buses,
+ physmem = SimpleMemory(), membus = Bus(clock = busFrequency))
system.toL2bus = Bus(clock = busFrequency)
system.l2 = L2(size = options.l2size, assoc = 8)
diff --git a/configs/splash2/run.py b/configs/splash2/run.py
index 2681a222d..40dafceff 100644
--- a/configs/splash2/run.py
+++ b/configs/splash2/run.py
@@ -197,7 +197,7 @@ else:
# ----------------------
# Create a system, and add system wide objects
# ----------------------
-system = System(cpu = cpus, physmem = PhysicalMemory(),
+system = System(cpu = cpus, physmem = SimpleMemory(),
membus = Bus(clock = busFrequency))
system.toL2bus = Bus(clock = busFrequency)
generated by cgit v1.2.3 (git 2.25.1) at 2025-02-26 11:36:55 +0000