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-rw-r--r--configs/common/cores/arm/O3_ARM_v7a.py3
-rw-r--r--configs/common/cores/arm/ex5_LITTLE.py5
-rw-r--r--configs/common/cores/arm/ex5_big.py3
3 files changed, 6 insertions, 5 deletions
diff --git a/configs/common/cores/arm/O3_ARM_v7a.py b/configs/common/cores/arm/O3_ARM_v7a.py
index fde4d3c60..b0ba1280f 100644
--- a/configs/common/cores/arm/O3_ARM_v7a.py
+++ b/configs/common/cores/arm/O3_ARM_v7a.py
@@ -201,4 +201,5 @@ class O3_ARM_v7aL2(Cache):
clusivity = 'mostly_excl'
# Simple stride prefetcher
prefetcher = StridePrefetcher(degree=8, latency = 1)
- tags = RandomRepl()
+ tags = BaseSetAssoc()
+ repl_policy = RandomRP()
diff --git a/configs/common/cores/arm/ex5_LITTLE.py b/configs/common/cores/arm/ex5_LITTLE.py
index a866b167b..1ae0f16df 100644
--- a/configs/common/cores/arm/ex5_LITTLE.py
+++ b/configs/common/cores/arm/ex5_LITTLE.py
@@ -145,6 +145,5 @@ class L2(Cache):
clusivity = 'mostly_excl'
# Simple stride prefetcher
prefetcher = StridePrefetcher(degree=1, latency = 1)
- tags = RandomRepl()
-
-
+ tags = BaseSetAssoc()
+ repl_policy = RandomRP()
diff --git a/configs/common/cores/arm/ex5_big.py b/configs/common/cores/arm/ex5_big.py
index f4ca04740..96323f435 100644
--- a/configs/common/cores/arm/ex5_big.py
+++ b/configs/common/cores/arm/ex5_big.py
@@ -197,4 +197,5 @@ class L2(Cache):
clusivity = 'mostly_excl'
# Simple stride prefetcher
prefetcher = StridePrefetcher(degree=8, latency = 1)
- tags = RandomRepl()
+ tags = BaseSetAssoc()
+ repl_policy = RandomRP()