diff options
Diffstat (limited to 'configs')
| -rw-r--r-- | configs/common/Caches.py | 7 | ||||
| -rw-r--r-- | configs/common/FSConfig.py | 4 | ||||
| -rw-r--r-- | configs/common/Options.py | 1 | ||||
| -rw-r--r-- | configs/example/fs.py | 12 | ||||
| -rw-r--r-- | configs/example/se.py | 3 |
5 files changed, 24 insertions, 3 deletions
diff --git a/configs/common/Caches.py b/configs/common/Caches.py index 43a1c6378..f1ea957b5 100644 --- a/configs/common/Caches.py +++ b/configs/common/Caches.py @@ -43,3 +43,10 @@ class L2Cache(BaseCache): mshrs = 20 tgts_per_mshr = 12 +class IOCache(BaseCache): + assoc = 8 + block_size = 64 + latency = '10ns' + mshrs = 20 + size = '1kB' + tgts_per_mshr = 12 diff --git a/configs/common/FSConfig.py b/configs/common/FSConfig.py index 6bcdafb14..e2d6b710b 100644 --- a/configs/common/FSConfig.py +++ b/configs/common/FSConfig.py @@ -53,7 +53,7 @@ def makeLinuxAlphaSystem(mem_mode, mdesc = None): self.readfile = mdesc.script() self.iobus = Bus(bus_id=0) self.membus = Bus(bus_id=1) - self.bridge = Bridge(fix_partial_write_b=True, delay='50ns', nack_delay='4ns') + self.bridge = Bridge(delay='50ns', nack_delay='4ns') self.physmem = PhysicalMemory(range = AddrRange(mdesc.mem())) self.bridge.side_a = self.iobus.port self.bridge.side_b = self.membus.port @@ -93,7 +93,7 @@ def makeSparcSystem(mem_mode, mdesc = None): self.readfile = mdesc.script() self.iobus = Bus(bus_id=0) self.membus = Bus(bus_id=1) - self.bridge = Bridge(fix_partial_write_b=True, delay='50ns', nack_delay='4ns') + self.bridge = Bridge(delay='50ns', nack_delay='4ns') self.t1000 = T1000() self.t1000.attachOnChipIO(self.membus) self.t1000.attachIO(self.iobus) diff --git a/configs/common/Options.py b/configs/common/Options.py index 4f2b317c0..225916840 100644 --- a/configs/common/Options.py +++ b/configs/common/Options.py @@ -32,6 +32,7 @@ parser.add_option("-t", "--timing", action="store_true") parser.add_option("-n", "--num_cpus", type="int", default=1) parser.add_option("--caches", action="store_true") parser.add_option("--l2cache", action="store_true") +parser.add_option("--fastmem", action="store_true") # Run duration options parser.add_option("-m", "--maxtick", type="int") diff --git a/configs/example/fs.py b/configs/example/fs.py index e772a3ab1..3a57fe5b8 100644 --- a/configs/example/fs.py +++ b/configs/example/fs.py @@ -121,12 +121,20 @@ for i in xrange(np): if options.caches: test_sys.cpu[i].addPrivateSplitL1Caches(L1Cache(size = '32kB'), L1Cache(size = '64kB')) - + test_sys.bridge.filter_ranges_a=[AddrRange(0, Addr.max)] + test_sys.bridge.filter_ranges_b=[AddrRange(0, size='8GB')] + test_sys.iocache = IOCache(mem_side_filter_ranges=[AddrRange(0, Addr.max)], + cpu_side_filter_ranges=[AddrRange(0x8000000000, Addr.max)]) + test_sys.iocache.cpu_side = test_sys.iobus.port + test_sys.iocache.mem_side = test_sys.membus.port if options.l2cache: test_sys.cpu[i].connectMemPorts(test_sys.tol2bus) else: test_sys.cpu[i].connectMemPorts(test_sys.membus) + if options.fastmem: + test_sys.cpu[i].physmem_port = test_sys.physmem.port + if len(bm) == 2: if m5.build_env['TARGET_ISA'] == 'alpha': drive_sys = makeLinuxAlphaSystem(drive_mem_mode, bm[1]) @@ -134,6 +142,8 @@ if len(bm) == 2: drive_sys = makeSparcSystem(drive_mem_mode, bm[1]) drive_sys.cpu = DriveCPUClass(cpu_id=0) drive_sys.cpu.connectMemPorts(drive_sys.membus) + if options.fastmem: + drive_sys.cpu.physmem_port = drive_sys.physmem.port if options.kernel is not None: drive_sys.kernel = binary(options.kernel) diff --git a/configs/example/se.py b/configs/example/se.py index 20fe75a21..639bcd7c6 100644 --- a/configs/example/se.py +++ b/configs/example/se.py @@ -114,6 +114,9 @@ for i in xrange(np): system.cpu[i].connectMemPorts(system.membus) system.cpu[i].workload = process + if options.fastmem: + system.cpu[0].physmem_port = system.physmem.port + root = Root(system = system) Simulation.run(options, root, system, FutureClass) |