summaryrefslogtreecommitdiff
path: root/configs
diff options
context:
space:
mode:
Diffstat (limited to 'configs')
-rw-r--r--configs/common/cores/arm/O3_ARM_v7a.py2
-rw-r--r--configs/common/cores/arm/ex5_LITTLE.py2
-rw-r--r--configs/common/cores/arm/ex5_big.py2
3 files changed, 3 insertions, 3 deletions
diff --git a/configs/common/cores/arm/O3_ARM_v7a.py b/configs/common/cores/arm/O3_ARM_v7a.py
index 3a1f9af7c..eaeeee336 100644
--- a/configs/common/cores/arm/O3_ARM_v7a.py
+++ b/configs/common/cores/arm/O3_ARM_v7a.py
@@ -204,4 +204,4 @@ class O3_ARM_v7aL2(Cache):
# Simple stride prefetcher
prefetcher = StridePrefetcher(degree=8, latency = 1)
tags = BaseSetAssoc()
- repl_policy = RandomRP()
+ replacement_policy = RandomRP()
diff --git a/configs/common/cores/arm/ex5_LITTLE.py b/configs/common/cores/arm/ex5_LITTLE.py
index 85fdd5541..ab946662f 100644
--- a/configs/common/cores/arm/ex5_LITTLE.py
+++ b/configs/common/cores/arm/ex5_LITTLE.py
@@ -149,4 +149,4 @@ class L2(Cache):
# Simple stride prefetcher
prefetcher = StridePrefetcher(degree=1, latency = 1)
tags = BaseSetAssoc()
- repl_policy = RandomRP()
+ replacement_policy = RandomRP()
diff --git a/configs/common/cores/arm/ex5_big.py b/configs/common/cores/arm/ex5_big.py
index 445aa3255..c2b25a07a 100644
--- a/configs/common/cores/arm/ex5_big.py
+++ b/configs/common/cores/arm/ex5_big.py
@@ -201,4 +201,4 @@ class L2(Cache):
# Simple stride prefetcher
prefetcher = StridePrefetcher(degree=8, latency = 1)
tags = BaseSetAssoc()
- repl_policy = RandomRP()
+ replacement_policy = RandomRP()