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-rw-r--r--cpu/base.hh13
1 files changed, 10 insertions, 3 deletions
diff --git a/cpu/base.hh b/cpu/base.hh
index c0e087f42..0866b49a7 100644
--- a/cpu/base.hh
+++ b/cpu/base.hh
@@ -36,9 +36,10 @@
#include "cpu/sampler/sampler.hh"
#include "sim/eventq.hh"
#include "sim/sim_object.hh"
-#include "targetarch/isa_traits.hh"
+#include "arch/isa_traits.hh"
class System;
+namespace Kernel { class Statistics; }
class BranchPred;
class ExecContext;
class Port;
@@ -56,7 +57,7 @@ class BaseCPU : public SimObject
#if FULL_SYSTEM
protected:
- uint64_t interrupts[NumInterruptLevels];
+ uint64_t interrupts[TheISA::NumInterruptLevels];
uint64_t intstatus;
public:
@@ -66,7 +67,7 @@ class BaseCPU : public SimObject
bool checkInterrupts;
bool check_interrupt(int int_num) const {
- if (int_num > NumInterruptLevels)
+ if (int_num > TheISA::NumInterruptLevels)
panic("int_num out of bounds\n");
return interrupts[int_num] != 0;
@@ -138,6 +139,8 @@ class BaseCPU : public SimObject
virtual void startup();
virtual void regStats();
+ virtual void activateWhenReady(int tid) {};
+
void registerExecContexts();
/// Prepare for another CPU to take over execution. When it is
@@ -230,6 +233,10 @@ class BaseCPU : public SimObject
public:
// Number of CPU cycles simulated
Stats::Scalar<> numCycles;
+
+#if FULL_SYSTEM
+ Kernel::Statistics *kernelStats;
+#endif
};
#endif // __CPU_BASE_HH__