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-rw-r--r--cpu/base_dyn_inst.hh13
1 files changed, 8 insertions, 5 deletions
diff --git a/cpu/base_dyn_inst.hh b/cpu/base_dyn_inst.hh
index 7651b517e..fe30b5195 100644
--- a/cpu/base_dyn_inst.hh
+++ b/cpu/base_dyn_inst.hh
@@ -53,12 +53,12 @@ namespace Trace {
class InstRecord;
};
-class BaseInst
-{
-};
+// Forward declaration.
+template <class blah>
+class StaticInstPtr;
template <class Impl>
-class BaseDynInst : public FastAlloc
+class BaseDynInst : public FastAlloc, public RefCounted
{
public:
// Typedef for the CPU.
@@ -74,7 +74,7 @@ class BaseDynInst : public FastAlloc
/// Logical register index type.
typedef typename ISA::RegIndex RegIndex;
/// Integer register index type.
- typedef typename ISA::IntReg IntReg;
+ typedef typename ISA::IntReg IntReg;
enum {
MaxInstSrcRegs = ISA::MaxInstSrcRegs, //< Max source regs
@@ -430,6 +430,9 @@ class BaseDynInst : public FastAlloc
/** Sets this instruction as ready to commit. */
void setCanCommit() { canCommit = true; }
+ /** Clears this instruction as being ready to commit. */
+ void clearCanCommit() { canCommit = false; }
+
/** Returns whether or not this instruction is ready to commit. */
bool readyToCommit() const { return canCommit; }