diff options
Diffstat (limited to 'cpu/beta_cpu/fetch_impl.hh')
-rw-r--r-- | cpu/beta_cpu/fetch_impl.hh | 4 |
1 files changed, 1 insertions, 3 deletions
diff --git a/cpu/beta_cpu/fetch_impl.hh b/cpu/beta_cpu/fetch_impl.hh index 0ec4c63a3..7adfecc52 100644 --- a/cpu/beta_cpu/fetch_impl.hh +++ b/cpu/beta_cpu/fetch_impl.hh @@ -35,8 +35,7 @@ SimpleFetch<Impl>::CacheCompletionEvent::description() template<class Impl> SimpleFetch<Impl>::SimpleFetch(Params ¶ms) - : //cacheCompletionEvent(this), - icacheInterface(params.icacheInterface), + : icacheInterface(params.icacheInterface), branchPred(params), decodeToFetchDelay(params.decodeToFetchDelay), renameToFetchDelay(params.renameToFetchDelay), @@ -254,7 +253,6 @@ SimpleFetch<Impl>::fetchCacheLine(Addr fetch_PC) // up this stage once the cache miss completes. if (result != MA_HIT && icacheInterface->doEvents()) { memReq->completionEvent = new CacheCompletionEvent(this); -// lastIcacheStall = curTick; // How does current model work as far as individual // stages scheduling/unscheduling? |