diff options
Diffstat (limited to 'cpu/beta_cpu/iew.hh')
-rw-r--r-- | cpu/beta_cpu/iew.hh | 33 |
1 files changed, 29 insertions, 4 deletions
diff --git a/cpu/beta_cpu/iew.hh b/cpu/beta_cpu/iew.hh index 1e5eb2244..3e5fbe78c 100644 --- a/cpu/beta_cpu/iew.hh +++ b/cpu/beta_cpu/iew.hh @@ -1,6 +1,34 @@ +/* + * Copyright (c) 2004-2005 The Regents of The University of Michigan + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions are + * met: redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer; + * redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution; + * neither the name of the copyright holders nor the names of its + * contributors may be used to endorse or promote products derived from + * this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR + * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT + * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, + * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT + * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE + * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + */ + //Todo: Update with statuses. //Need to handle delaying writes to the writeback bus if it's full at the -//given time. Load store queue. +//given time. #ifndef __CPU_BETA_CPU_SIMPLE_IEW_HH__ #define __CPU_BETA_CPU_SIMPLE_IEW_HH__ @@ -11,9 +39,6 @@ #include "base/timebuf.hh" #include "cpu/beta_cpu/comm.hh" -//Can IEW even stall? Space should be available/allocated already...maybe -//if there's not enough write ports on the ROB or waiting for CDB -//arbitration. template<class Impl> class SimpleIEW { |