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Diffstat (limited to 'cpu/exec_context.hh')
-rw-r--r--cpu/exec_context.hh49
1 files changed, 33 insertions, 16 deletions
diff --git a/cpu/exec_context.hh b/cpu/exec_context.hh
index 2fdb19c73..9404b126b 100644
--- a/cpu/exec_context.hh
+++ b/cpu/exec_context.hh
@@ -36,15 +36,15 @@
#include "sim/serialize.hh"
#include "sim/byteswap.hh"
-// forward declaration: see functional_memory.hh
// @todo: Figure out a more architecture independent way to obtain the ITB and
// DTB pointers.
class AlphaDTB;
class AlphaITB;
class BaseCPU;
class Event;
-class PhysicalMemory;
class TranslatingPort;
+class FunctionalPort;
+class VirtualPort;
class Process;
class System;
@@ -83,8 +83,6 @@ class ExecContext
virtual ~ExecContext() { };
- virtual TranslatingPort *getMemPort() = 0;
-
virtual BaseCPU *getCpuPtr() = 0;
virtual void setCpuId(int id) = 0;
@@ -94,12 +92,18 @@ class ExecContext
#if FULL_SYSTEM
virtual System *getSystemPtr() = 0;
- virtual PhysicalMemory *getPhysMemPtr() = 0;
-
virtual AlphaITB *getITBPtr() = 0;
virtual AlphaDTB * getDTBPtr() = 0;
+
+ virtual FunctionalPort *getPhysPort() = 0;
+
+ virtual VirtualPort *getVirtPort(ExecContext *xc = NULL) = 0;
+
+ virtual void delVirtPort(VirtualPort *vp) = 0;
#else
+ virtual TranslatingPort *getMemPort() = 0;
+
virtual Process *getProcessPtr() = 0;
#endif
@@ -148,11 +152,11 @@ class ExecContext
virtual int getInstAsid() = 0;
virtual int getDataAsid() = 0;
- virtual Fault translateInstReq(CpuRequestPtr &req) = 0;
+ virtual Fault translateInstReq(RequestPtr &req) = 0;
- virtual Fault translateDataReadReq(CpuRequestPtr &req) = 0;
+ virtual Fault translateDataReadReq(RequestPtr &req) = 0;
- virtual Fault translateDataWriteReq(CpuRequestPtr &req) = 0;
+ virtual Fault translateDataWriteReq(RequestPtr &req) = 0;
// Also somewhat obnoxious. Really only used for the TLB fault.
// However, may be quite useful in SPARC.
@@ -237,6 +241,9 @@ class ExecContext
virtual void setFuncExeInst(Counter new_val) = 0;
#endif
+
+ virtual void changeRegFileContext(RegFile::ContextParam param,
+ RegFile::ContextVal val) = 0;
};
template <class XC>
@@ -251,8 +258,6 @@ class ProxyExecContext : public ExecContext
public:
- TranslatingPort *getMemPort() { return actualXC->getMemPort(); }
-
BaseCPU *getCpuPtr() { return actualXC->getCpuPtr(); }
void setCpuId(int id) { actualXC->setCpuId(id); }
@@ -262,12 +267,18 @@ class ProxyExecContext : public ExecContext
#if FULL_SYSTEM
System *getSystemPtr() { return actualXC->getSystemPtr(); }
- PhysicalMemory *getPhysMemPtr() { return actualXC->getPhysMemPtr(); }
-
AlphaITB *getITBPtr() { return actualXC->getITBPtr(); }
AlphaDTB *getDTBPtr() { return actualXC->getDTBPtr(); }
+
+ FunctionalPort *getPhysPort() { return actualXC->getPhysPort(); }
+
+ VirtualPort *getVirtPort(ExecContext *xc = NULL) { return actualXC->getVirtPort(xc); }
+
+ void delVirtPort(VirtualPort *vp) { return actualXC->delVirtPort(vp); }
#else
+ TranslatingPort *getMemPort() { return actualXC->getMemPort(); }
+
Process *getProcessPtr() { return actualXC->getProcessPtr(); }
#endif
@@ -316,13 +327,13 @@ class ProxyExecContext : public ExecContext
int getInstAsid() { return actualXC->getInstAsid(); }
int getDataAsid() { return actualXC->getDataAsid(); }
- Fault translateInstReq(CpuRequestPtr &req)
+ Fault translateInstReq(RequestPtr &req)
{ return actualXC->translateInstReq(req); }
- Fault translateDataReadReq(CpuRequestPtr &req)
+ Fault translateDataReadReq(RequestPtr &req)
{ return actualXC->translateDataReadReq(req); }
- Fault translateDataWriteReq(CpuRequestPtr &req)
+ Fault translateDataWriteReq(RequestPtr &req)
{ return actualXC->translateDataWriteReq(req); }
// @todo: Do I need this?
@@ -428,6 +439,12 @@ class ProxyExecContext : public ExecContext
void setFuncExeInst(Counter new_val)
{ return actualXC->setFuncExeInst(new_val); }
#endif
+
+ void changeRegFileContext(RegFile::ContextParam param,
+ RegFile::ContextVal val)
+ {
+ actualXC->changeRegFileContext(param, val);
+ }
};
#endif