diff options
Diffstat (limited to 'cpu/exec_context.hh')
-rw-r--r-- | cpu/exec_context.hh | 84 |
1 files changed, 50 insertions, 34 deletions
diff --git a/cpu/exec_context.hh b/cpu/exec_context.hh index 2b6c41bd7..2fdb19c73 100644 --- a/cpu/exec_context.hh +++ b/cpu/exec_context.hh @@ -30,7 +30,7 @@ #define __CPU_EXEC_CONTEXT_HH__ #include "config/full_system.hh" -#include "mem/mem_req.hh" +#include "mem/request.hh" #include "sim/faults.hh" #include "sim/host.hh" #include "sim/serialize.hh" @@ -43,8 +43,8 @@ class AlphaDTB; class AlphaITB; class BaseCPU; class Event; -class FunctionalMemory; class PhysicalMemory; +class TranslatingPort; class Process; class System; @@ -54,6 +54,8 @@ class ExecContext typedef TheISA::RegFile RegFile; typedef TheISA::MachInst MachInst; typedef TheISA::IntReg IntReg; + typedef TheISA::FloatReg FloatReg; + typedef TheISA::FloatRegBits FloatRegBits; typedef TheISA::MiscRegFile MiscRegFile; typedef TheISA::MiscReg MiscReg; public: @@ -81,14 +83,14 @@ class ExecContext virtual ~ExecContext() { }; + virtual TranslatingPort *getMemPort() = 0; + virtual BaseCPU *getCpuPtr() = 0; virtual void setCpuId(int id) = 0; virtual int readCpuId() = 0; - virtual FunctionalMemory *getMemPtr() = 0; - #if FULL_SYSTEM virtual System *getSystemPtr() = 0; @@ -143,16 +145,14 @@ class ExecContext virtual int getThreadNum() = 0; - virtual bool validInstAddr(Addr addr) = 0; - virtual bool validDataAddr(Addr addr) = 0; virtual int getInstAsid() = 0; virtual int getDataAsid() = 0; - virtual Fault translateInstReq(MemReqPtr &req) = 0; + virtual Fault translateInstReq(CpuRequestPtr &req) = 0; - virtual Fault translateDataReadReq(MemReqPtr &req) = 0; + virtual Fault translateDataReadReq(CpuRequestPtr &req) = 0; - virtual Fault translateDataWriteReq(MemReqPtr &req) = 0; + virtual Fault translateDataWriteReq(CpuRequestPtr &req) = 0; // Also somewhat obnoxious. Really only used for the TLB fault. // However, may be quite useful in SPARC. @@ -167,19 +167,23 @@ class ExecContext // virtual uint64_t readIntReg(int reg_idx) = 0; - virtual float readFloatRegSingle(int reg_idx) = 0; + virtual FloatReg readFloatReg(int reg_idx, int width) = 0; + + virtual FloatReg readFloatReg(int reg_idx) = 0; - virtual double readFloatRegDouble(int reg_idx) = 0; + virtual FloatRegBits readFloatRegBits(int reg_idx, int width) = 0; - virtual uint64_t readFloatRegInt(int reg_idx) = 0; + virtual FloatRegBits readFloatRegBits(int reg_idx) = 0; virtual void setIntReg(int reg_idx, uint64_t val) = 0; - virtual void setFloatRegSingle(int reg_idx, float val) = 0; + virtual void setFloatReg(int reg_idx, FloatReg val, int width) = 0; - virtual void setFloatRegDouble(int reg_idx, double val) = 0; + virtual void setFloatReg(int reg_idx, FloatReg val) = 0; - virtual void setFloatRegInt(int reg_idx, uint64_t val) = 0; + virtual void setFloatRegBits(int reg_idx, FloatRegBits val) = 0; + + virtual void setFloatRegBits(int reg_idx, FloatRegBits val, int width) = 0; virtual uint64_t readPC() = 0; @@ -189,6 +193,10 @@ class ExecContext virtual void setNextPC(uint64_t val) = 0; + virtual uint64_t readNextNPC() = 0; + + virtual void setNextNPC(uint64_t val) = 0; + virtual MiscReg readMiscReg(int misc_reg) = 0; virtual MiscReg readMiscRegWithEffect(int misc_reg, Fault &fault) = 0; @@ -243,14 +251,14 @@ class ProxyExecContext : public ExecContext public: + TranslatingPort *getMemPort() { return actualXC->getMemPort(); } + BaseCPU *getCpuPtr() { return actualXC->getCpuPtr(); } void setCpuId(int id) { actualXC->setCpuId(id); } int readCpuId() { return actualXC->readCpuId(); } - FunctionalMemory *getMemPtr() { return actualXC->getMemPtr(); } - #if FULL_SYSTEM System *getSystemPtr() { return actualXC->getSystemPtr(); } @@ -305,18 +313,16 @@ class ProxyExecContext : public ExecContext int getThreadNum() { return actualXC->getThreadNum(); } - bool validInstAddr(Addr addr) { return actualXC->validInstAddr(addr); } - bool validDataAddr(Addr addr) { return actualXC->validDataAddr(addr); } int getInstAsid() { return actualXC->getInstAsid(); } int getDataAsid() { return actualXC->getDataAsid(); } - Fault translateInstReq(MemReqPtr &req) + Fault translateInstReq(CpuRequestPtr &req) { return actualXC->translateInstReq(req); } - Fault translateDataReadReq(MemReqPtr &req) + Fault translateDataReadReq(CpuRequestPtr &req) { return actualXC->translateDataReadReq(req); } - Fault translateDataWriteReq(MemReqPtr &req) + Fault translateDataWriteReq(CpuRequestPtr &req) { return actualXC->translateDataWriteReq(req); } // @todo: Do I need this? @@ -333,26 +339,32 @@ class ProxyExecContext : public ExecContext uint64_t readIntReg(int reg_idx) { return actualXC->readIntReg(reg_idx); } - float readFloatRegSingle(int reg_idx) - { return actualXC->readFloatRegSingle(reg_idx); } + FloatReg readFloatReg(int reg_idx, int width) + { return actualXC->readFloatReg(reg_idx, width); } + + FloatReg readFloatReg(int reg_idx) + { return actualXC->readFloatReg(reg_idx); } - double readFloatRegDouble(int reg_idx) - { return actualXC->readFloatRegDouble(reg_idx); } + FloatRegBits readFloatRegBits(int reg_idx, int width) + { return actualXC->readFloatRegBits(reg_idx, width); } - uint64_t readFloatRegInt(int reg_idx) - { return actualXC->readFloatRegInt(reg_idx); } + FloatRegBits readFloatRegBits(int reg_idx) + { return actualXC->readFloatRegBits(reg_idx); } void setIntReg(int reg_idx, uint64_t val) { actualXC->setIntReg(reg_idx, val); } - void setFloatRegSingle(int reg_idx, float val) - { actualXC->setFloatRegSingle(reg_idx, val); } + void setFloatReg(int reg_idx, FloatReg val, int width) + { actualXC->setFloatReg(reg_idx, val, width); } - void setFloatRegDouble(int reg_idx, double val) - { actualXC->setFloatRegDouble(reg_idx, val); } + void setFloatReg(int reg_idx, FloatReg val) + { actualXC->setFloatReg(reg_idx, val); } - void setFloatRegInt(int reg_idx, uint64_t val) - { actualXC->setFloatRegInt(reg_idx, val); } + void setFloatRegBits(int reg_idx, FloatRegBits val, int width) + { actualXC->setFloatRegBits(reg_idx, val, width); } + + void setFloatRegBits(int reg_idx, FloatRegBits val) + { actualXC->setFloatRegBits(reg_idx, val); } uint64_t readPC() { return actualXC->readPC(); } @@ -362,6 +374,10 @@ class ProxyExecContext : public ExecContext void setNextPC(uint64_t val) { actualXC->setNextPC(val); } + uint64_t readNextNPC() { return actualXC->readNextNPC(); } + + void setNextNPC(uint64_t val) { actualXC->setNextNPC(val); } + MiscReg readMiscReg(int misc_reg) { return actualXC->readMiscReg(misc_reg); } |