1 files changed, 13 insertions, 18 deletions

diff --git a/cpu/o3/cpu.hh b/cpu/o3/cpu.hh
index 75dca5056..6577e46e4 100644
--- a/cpu/o3/cpu.hh
+++ b/cpu/o3/cpu.hh
@@ -44,16 +44,12 @@
 #include "base/timebuf.hh"
 #include "config/full_system.hh"
 #include "cpu/base.hh"
+#include "cpu/cpu_exec_context.hh"
 #include "cpu/o3/comm.hh"
 #include "cpu/o3/cpu_policy.hh"
-#include "cpu/exec_context.hh"
 #include "sim/process.hh"
 
-#if FULL_SYSTEM
-#include "arch/alpha/ev5.hh"
-using namespace EV5;
-#endif
-
+class ExecContext;
 class FunctionalMemory;
 class Process;
 
@@ -78,7 +74,6 @@ class FullO3CPU : public BaseFullCPU
 {
   public:
     //Put typedefs from the Impl here.
-    typedef typename Impl::ISA ISA;
     typedef typename Impl::CPUPol CPUPolicy;
     typedef typename Impl::Params Params;
     typedef typename Impl::DynInstPtr DynInstPtr;
@@ -153,11 +148,11 @@ class FullO3CPU : public BaseFullCPU
 
     /** Get instruction asid. */
     int getInstAsid()
-    { return ITB_ASN_ASN(regFile.getIpr()[ISA::IPR_ITB_ASN]); }
+    { return regFile.miscRegs.getInstAsid(); }
 
     /** Get data asid. */
     int getDataAsid()
-    { return DTB_ASN_ASN(regFile.getIpr()[ISA::IPR_DTB_ASN]); }
+    { return regFile.miscRegs.getDataAsid(); }
 #else
     bool validInstAddr(Addr addr)
     { return thread[0]->validInstAddr(addr); }
@@ -165,8 +160,8 @@ class FullO3CPU : public BaseFullCPU
     bool validDataAddr(Addr addr)
     { return thread[0]->validDataAddr(addr); }
 
-    int getInstAsid() { return thread[0]->asid; }
-    int getDataAsid() { return thread[0]->asid; }
+    int getInstAsid() { return thread[0]->getInstAsid(); }
+    int getDataAsid() { return thread[0]->getDataAsid(); }
 
 #endif
 
@@ -321,16 +316,17 @@ class FullO3CPU : public BaseFullCPU
 
   public:
     /** The temporary exec context to support older accessors. */
-    ExecContext *xc;
+    CPUExecContext *cpuXC;
 
     /** Temporary function to get pointer to exec context. */
     ExecContext *xcBase()
     {
-#if FULL_SYSTEM
-        return system->execContexts[0];
-#else
+        return thread[0]->getProxy();
+    }
+
+    CPUExecContext *cpuXCBase()
+    {
         return thread[0];
-#endif
     }
 
     InstSeqNum globalSeqNum;
@@ -345,9 +341,8 @@ class FullO3CPU : public BaseFullCPU
     AlphaDTB *dtb;
 
 //    SWContext *swCtx;
-#else
-    std::vector<ExecContext *> thread;
 #endif
+    std::vector<CPUExecContext *> thread;
 
     FunctionalMemory *mem;