7 files changed, 22 insertions, 21 deletions

diff --git a/cpu/o3/alpha_cpu.hh b/cpu/o3/alpha_cpu.hh
index 75a4d72c2..531f6aa45 100644
--- a/cpu/o3/alpha_cpu.hh
+++ b/cpu/o3/alpha_cpu.hh
@@ -275,7 +275,7 @@ class AlphaFullCPU : public FullO3CPU<Impl>
 
 #endif
 
-        return this->mem->write(req, (T)::htog(data));
+        return this->mem->write(req, (T)htog(data));
     }
 
     template <class T>
diff --git a/cpu/o3/alpha_cpu_builder.cc b/cpu/o3/alpha_cpu_builder.cc
index 7e687ad2b..6025b8ef2 100644
--- a/cpu/o3/alpha_cpu_builder.cc
+++ b/cpu/o3/alpha_cpu_builder.cc
@@ -49,8 +49,8 @@
 #include "mem/functional/memory_control.hh"
 #include "mem/functional/physical.hh"
 #include "sim/system.hh"
-#include "targetarch/alpha_memory.hh"
-#include "targetarch/vtophys.hh"
+#include "arch/tlb.hh"
+#include "arch/vtophys.hh"
 #else // !FULL_SYSTEM
 #include "mem/functional/functional.hh"
 #endif // FULL_SYSTEM
diff --git a/cpu/o3/alpha_cpu_impl.hh b/cpu/o3/alpha_cpu_impl.hh
index 271b542ab..33e363d4f 100644
--- a/cpu/o3/alpha_cpu_impl.hh
+++ b/cpu/o3/alpha_cpu_impl.hh
@@ -260,7 +260,7 @@ Fault
 AlphaFullCPU<Impl>::hwrei()
 {
     if (!inPalMode())
-        return UnimplementedOpcodeFault;
+        return new UnimplementedOpcodeFault;
 
     this->setNextPC(this->regFile.miscRegs.readReg(AlphaISA::IPR_EXC_ADDR));
 
@@ -305,24 +305,25 @@ template <class Impl>
 void
 AlphaFullCPU<Impl>::trap(Fault fault)
 {
-    // Keep in mind that a trap may be initiated by fetch if there's a TLB
+/*    // Keep in mind that a trap may be initiated by fetch if there's a TLB
     // miss
     uint64_t PC = this->commit.readCommitPC();
 
-    DPRINTF(Fault, "Fault %s\n", fault ? fault->name : "name");
-    this->recordEvent(csprintf("Fault %s", fault ? fault->name : "name"));
+    DPRINTF(Fault, "Fault %s\n", fault->name());
+    this->recordEvent(csprintf("Fault %s", fault->name()));
 
-//    kernelStats.fault(fault);
+    //kernelStats.fault(fault);
 
-    if (fault == ArithmeticFault)
+    if (fault->isA<ArithmeticFault>())
         panic("Arithmetic traps are unimplemented!");
 
     // exception restart address - Get the commit PC
-    if (fault != InterruptFault || !inPalMode(PC))
+    if (!fault->isA<InterruptFault>() || !inPalMode(PC))
         this->regFile.miscRegs.setReg(AlphaISA::IPR_EXC_ADDR, PC);
 
-    if (fault == PalFault || fault == ArithmeticFault /* ||
-        fault == InterruptFault && !PC_PAL(regs.pc) */) {
+    if (fault->isA<PalFault>() || fault->isA<ArithmeticFault>())
+    //    || fault == InterruptFault && !PC_PAL(regs.pc)
+        {
         // traps...  skip faulting instruction
         AlphaISA::MiscReg ipr_exc_addr =
             this->regFile.miscRegs.readReg(AlphaISA::IPR_EXC_ADDR);
@@ -334,8 +335,8 @@ AlphaFullCPU<Impl>::trap(Fault fault)
         swapPALShadow(true);
 
     this->regFile.setPC(this->regFile.miscRegs.readReg(AlphaISA::IPR_PAL_BASE) +
-                         AlphaISA::fault_addr(fault) );
-    this->regFile.setNextPC(PC + sizeof(MachInst));
+                         (dynamic_cast<AlphaFault *>(fault.get()))->vect());
+    this->regFile.setNextPC(PC + sizeof(MachInst));*/
 }
 
 template <class Impl>
diff --git a/cpu/o3/bpred_unit.hh b/cpu/o3/bpred_unit.hh
index 0a77b83dc..2725684f7 100644
--- a/cpu/o3/bpred_unit.hh
+++ b/cpu/o3/bpred_unit.hh
@@ -30,7 +30,7 @@
 #define __BPRED_UNIT_HH__
 
 // For Addr type.
-#include "arch/alpha/isa_traits.hh"
+#include "arch/isa_traits.hh"
 #include "base/statistics.hh"
 #include "cpu/inst_seq.hh"
 
diff --git a/cpu/o3/comm.hh b/cpu/o3/comm.hh
index e4de1d304..c74c77ddf 100644
--- a/cpu/o3/comm.hh
+++ b/cpu/o3/comm.hh
@@ -31,7 +31,7 @@
 
 #include <vector>
 
-#include "arch/alpha/isa_traits.hh"
+#include "arch/isa_traits.hh"
 #include "cpu/inst_seq.hh"
 #include "sim/host.hh"
 
diff --git a/cpu/o3/cpu.hh b/cpu/o3/cpu.hh
index 45e21db7f..8f29a25fb 100644
--- a/cpu/o3/cpu.hh
+++ b/cpu/o3/cpu.hh
@@ -50,7 +50,7 @@
 #include "sim/process.hh"
 
 #if FULL_SYSTEM
-#include "arch/alpha/ev5.hh"
+#include "arch/ev5.hh"
 using namespace EV5;
 #endif
 
diff --git a/cpu/o3/regfile.hh b/cpu/o3/regfile.hh
index 1bc7159f6..03ad2da46 100644
--- a/cpu/o3/regfile.hh
+++ b/cpu/o3/regfile.hh
@@ -31,14 +31,14 @@
 
 // @todo: Destructor
 
-#include "arch/alpha/isa_traits.hh"
-#include "arch/alpha/faults.hh"
+#include "arch/isa_traits.hh"
+#include "arch/faults.hh"
 #include "base/trace.hh"
 #include "config/full_system.hh"
 #include "cpu/o3/comm.hh"
 
 #if FULL_SYSTEM
-#include "arch/alpha/ev5.hh"
+#include "arch/ev5.hh"
 #include "kern/kernel_stats.hh"
 
 using namespace EV5;
@@ -236,7 +236,7 @@ class PhysRegFile
 #if FULL_SYSTEM
   private:
     // This is ISA specifc stuff; remove it eventually once ISAImpl is used
-    IntReg palregs[NumIntRegs];	// PAL shadow registers
+//    IntReg palregs[NumIntRegs];	// PAL shadow registers
     InternalProcReg ipr[NumInternalProcRegs]; // internal processor regs
     int intrflag;			// interrupt flag
     bool pal_shadow;		// using pal_shadow registers