summaryrefslogtreecommitdiff
path: root/cpu/simple_cpu/simple_cpu.hh
diff options
context:
space:
mode:
Diffstat (limited to 'cpu/simple_cpu/simple_cpu.hh')
-rw-r--r--cpu/simple_cpu/simple_cpu.hh12
1 files changed, 6 insertions, 6 deletions
diff --git a/cpu/simple_cpu/simple_cpu.hh b/cpu/simple_cpu/simple_cpu.hh
index a04dcd057..a9091da7e 100644
--- a/cpu/simple_cpu/simple_cpu.hh
+++ b/cpu/simple_cpu/simple_cpu.hh
@@ -209,7 +209,7 @@ class SimpleCPU : public BaseCPU
// number of simulated instructions
Counter numInst;
Counter startNumInst;
- Statistics::Scalar<> numInsts;
+ Stats::Scalar<> numInsts;
virtual Counter totalInstructions() const
{
@@ -217,22 +217,22 @@ class SimpleCPU : public BaseCPU
}
// number of simulated memory references
- Statistics::Scalar<> numMemRefs;
+ Stats::Scalar<> numMemRefs;
// number of simulated loads
Counter numLoad;
Counter startNumLoad;
// number of idle cycles
- Statistics::Average<> notIdleFraction;
- Statistics::Formula idleFraction;
+ Stats::Average<> notIdleFraction;
+ Stats::Formula idleFraction;
// number of cycles stalled for I-cache misses
- Statistics::Scalar<> icacheStallCycles;
+ Stats::Scalar<> icacheStallCycles;
Counter lastIcacheStall;
// number of cycles stalled for D-cache misses
- Statistics::Scalar<> dcacheStallCycles;
+ Stats::Scalar<> dcacheStallCycles;
Counter lastDcacheStall;
void processCacheCompletion();