diff options
Diffstat (limited to 'cpu')
-rw-r--r-- | cpu/base_cpu.cc | 21 | ||||
-rw-r--r-- | cpu/base_cpu.hh | 19 | ||||
-rw-r--r-- | cpu/exec_context.cc | 2 | ||||
-rw-r--r-- | cpu/exec_context.hh | 2 | ||||
-rw-r--r-- | cpu/exetrace.cc | 12 | ||||
-rw-r--r-- | cpu/exetrace.hh | 2 | ||||
-rw-r--r-- | cpu/full_cpu/op_class.hh | 2 | ||||
-rw-r--r-- | cpu/inst_seq.hh | 2 | ||||
-rw-r--r-- | cpu/intr_control.cc | 2 | ||||
-rw-r--r-- | cpu/intr_control.hh | 2 | ||||
-rw-r--r-- | cpu/memtest/memtest.cc | 2 | ||||
-rw-r--r-- | cpu/memtest/memtest.hh | 2 | ||||
-rw-r--r-- | cpu/pc_event.cc | 2 | ||||
-rw-r--r-- | cpu/pc_event.hh | 2 | ||||
-rw-r--r-- | cpu/simple_cpu/simple_cpu.cc | 4 | ||||
-rw-r--r-- | cpu/simple_cpu/simple_cpu.hh | 2 | ||||
-rw-r--r-- | cpu/static_inst.hh | 2 |
17 files changed, 60 insertions, 22 deletions
diff --git a/cpu/base_cpu.cc b/cpu/base_cpu.cc index 702a9afe8..3ee7a3892 100644 --- a/cpu/base_cpu.cc +++ b/cpu/base_cpu.cc @@ -1,5 +1,5 @@ /* - * Copyright (c) 2003 The Regents of The University of Michigan + * Copyright (c) 2002-2004 The Regents of The University of Michigan * All rights reserved. * * Redistribution and use in source and binary forms, with or without @@ -209,7 +209,7 @@ BaseCPU::post_interrupt(int int_num, int index) if (int_num < 0 || int_num >= NumInterruptLevels) panic("int_num out of bounds\n"); - if (index < 0 || index >= sizeof(uint8_t) * 8) + if (index < 0 || index >= sizeof(uint64_t) * 8) panic("int_num out of bounds\n"); AlphaISA::check_interrupts = 1; @@ -225,7 +225,7 @@ BaseCPU::clear_interrupt(int int_num, int index) if (int_num < 0 || int_num >= NumInterruptLevels) panic("int_num out of bounds\n"); - if (index < 0 || index >= sizeof(uint8_t) * 8) + if (index < 0 || index >= sizeof(uint64_t) * 8) panic("int_num out of bounds\n"); interrupts[int_num] &= ~(1 << index); @@ -242,6 +242,21 @@ BaseCPU::clear_interrupts() intstatus = 0; } + +void +BaseCPU::serialize(std::ostream &os) +{ + SERIALIZE_ARRAY(interrupts, NumInterruptLevels); + SERIALIZE_SCALAR(intstatus); +} + +void +BaseCPU::unserialize(Checkpoint *cp, const std::string §ion) +{ + UNSERIALIZE_ARRAY(interrupts, NumInterruptLevels); + UNSERIALIZE_SCALAR(intstatus); +} + #endif // FULL_SYSTEM DEFINE_SIM_OBJECT_CLASS_NAME("BaseCPU", BaseCPU) diff --git a/cpu/base_cpu.hh b/cpu/base_cpu.hh index 9c4026784..f75f00409 100644 --- a/cpu/base_cpu.hh +++ b/cpu/base_cpu.hh @@ -1,5 +1,5 @@ /* - * Copyright (c) 2003 The Regents of The University of Michigan + * Copyright (c) 2002-2004 The Regents of The University of Michigan * All rights reserved. * * Redistribution and use in source and binary forms, with or without @@ -48,7 +48,7 @@ class BaseCPU : public SimObject #ifdef FULL_SYSTEM protected: Tick frequency; - uint8_t interrupts[NumInterruptLevels]; + uint64_t interrupts[NumInterruptLevels]; uint64_t intstatus; public: @@ -139,6 +139,21 @@ class BaseCPU : public SimObject #ifdef FULL_SYSTEM System *system; + + + /** + * Serialize this object to the given output stream. + * @param os The stream to serialize to. + */ + virtual void serialize(std::ostream &os); + + /** + * Reconstruct the state of this object from a checkpoint. + * @param cp The checkpoint use. + * @param section The section name of this object + */ + virtual void unserialize(Checkpoint *cp, const std::string §ion); + #endif /** diff --git a/cpu/exec_context.cc b/cpu/exec_context.cc index 0d3a80fe7..9c21b3a56 100644 --- a/cpu/exec_context.cc +++ b/cpu/exec_context.cc @@ -1,5 +1,5 @@ /* - * Copyright (c) 2003 The Regents of The University of Michigan + * Copyright (c) 2001-2004 The Regents of The University of Michigan * All rights reserved. * * Redistribution and use in source and binary forms, with or without diff --git a/cpu/exec_context.hh b/cpu/exec_context.hh index 7409095e2..08879b3b5 100644 --- a/cpu/exec_context.hh +++ b/cpu/exec_context.hh @@ -1,5 +1,5 @@ /* - * Copyright (c) 2003 The Regents of The University of Michigan + * Copyright (c) 2001-2004 The Regents of The University of Michigan * All rights reserved. * * Redistribution and use in source and binary forms, with or without diff --git a/cpu/exetrace.cc b/cpu/exetrace.cc index 3e8877e93..e31c3590c 100644 --- a/cpu/exetrace.cc +++ b/cpu/exetrace.cc @@ -1,5 +1,5 @@ /* - * Copyright (c) 2003 The Regents of The University of Michigan + * Copyright (c) 2001-2004 The Regents of The University of Michigan * All rights reserved. * * Redistribution and use in source and binary forms, with or without @@ -48,11 +48,12 @@ using namespace std; // -const SymbolTable *debugSymbolTable = NULL; +SymbolTable *debugSymbolTable = NULL; void Trace::InstRecord::dump(ostream &outs) { + if (flags[PRINT_CYCLE]) ccprintf(outs, "%7d: ", cycle); @@ -64,7 +65,12 @@ Trace::InstRecord::dump(ostream &outs) if (flags[PRINT_THREAD_NUM]) outs << "T" << thread << " : "; - outs << "0x" << hex << PC << " : "; + + std::string str; + if ((debugSymbolTable) && (debugSymbolTable->findNearestSymbol(PC, str))) + outs << "@" << setw(17) << str << " : "; + else + outs << "0x" << hex << PC << " : "; // // Print decoded instruction diff --git a/cpu/exetrace.hh b/cpu/exetrace.hh index 622ecd729..e114ebc03 100644 --- a/cpu/exetrace.hh +++ b/cpu/exetrace.hh @@ -1,5 +1,5 @@ /* - * Copyright (c) 2003 The Regents of The University of Michigan + * Copyright (c) 2001-2004 The Regents of The University of Michigan * All rights reserved. * * Redistribution and use in source and binary forms, with or without diff --git a/cpu/full_cpu/op_class.hh b/cpu/full_cpu/op_class.hh index 5e0a17186..a14ccfaed 100644 --- a/cpu/full_cpu/op_class.hh +++ b/cpu/full_cpu/op_class.hh @@ -1,5 +1,5 @@ /* - * Copyright (c) 2003 The Regents of The University of Michigan + * Copyright (c) 2003-2004 The Regents of The University of Michigan * All rights reserved. * * Redistribution and use in source and binary forms, with or without diff --git a/cpu/inst_seq.hh b/cpu/inst_seq.hh index 9c3898ff7..4c403de1e 100644 --- a/cpu/inst_seq.hh +++ b/cpu/inst_seq.hh @@ -1,5 +1,5 @@ /* - * Copyright (c) 2003 The Regents of The University of Michigan + * Copyright (c) 2001, 2003 The Regents of The University of Michigan * All rights reserved. * * Redistribution and use in source and binary forms, with or without diff --git a/cpu/intr_control.cc b/cpu/intr_control.cc index c71a36b6f..53de9d288 100644 --- a/cpu/intr_control.cc +++ b/cpu/intr_control.cc @@ -1,5 +1,5 @@ /* - * Copyright (c) 2003 The Regents of The University of Michigan + * Copyright (c) 2002-2003 The Regents of The University of Michigan * All rights reserved. * * Redistribution and use in source and binary forms, with or without diff --git a/cpu/intr_control.hh b/cpu/intr_control.hh index 37e62ed00..8cdc6b61b 100644 --- a/cpu/intr_control.hh +++ b/cpu/intr_control.hh @@ -1,5 +1,5 @@ /* - * Copyright (c) 2003 The Regents of The University of Michigan + * Copyright (c) 2001-2003 The Regents of The University of Michigan * All rights reserved. * * Redistribution and use in source and binary forms, with or without diff --git a/cpu/memtest/memtest.cc b/cpu/memtest/memtest.cc index 1d745724f..b55af332a 100644 --- a/cpu/memtest/memtest.cc +++ b/cpu/memtest/memtest.cc @@ -1,5 +1,5 @@ /* - * Copyright (c) 2003 The Regents of The University of Michigan + * Copyright (c) 2002-2004 The Regents of The University of Michigan * All rights reserved. * * Redistribution and use in source and binary forms, with or without diff --git a/cpu/memtest/memtest.hh b/cpu/memtest/memtest.hh index 4bde5c066..72e0709d9 100644 --- a/cpu/memtest/memtest.hh +++ b/cpu/memtest/memtest.hh @@ -1,5 +1,5 @@ /* - * Copyright (c) 2003 The Regents of The University of Michigan + * Copyright (c) 2002-2004 The Regents of The University of Michigan * All rights reserved. * * Redistribution and use in source and binary forms, with or without diff --git a/cpu/pc_event.cc b/cpu/pc_event.cc index 4ee93e864..a86c017d4 100644 --- a/cpu/pc_event.cc +++ b/cpu/pc_event.cc @@ -1,5 +1,5 @@ /* - * Copyright (c) 2003 The Regents of The University of Michigan + * Copyright (c) 2002-2003 The Regents of The University of Michigan * All rights reserved. * * Redistribution and use in source and binary forms, with or without diff --git a/cpu/pc_event.hh b/cpu/pc_event.hh index b425cc72c..131016fc6 100644 --- a/cpu/pc_event.hh +++ b/cpu/pc_event.hh @@ -1,5 +1,5 @@ /* - * Copyright (c) 2003 The Regents of The University of Michigan + * Copyright (c) 2002-2003 The Regents of The University of Michigan * All rights reserved. * * Redistribution and use in source and binary forms, with or without diff --git a/cpu/simple_cpu/simple_cpu.cc b/cpu/simple_cpu/simple_cpu.cc index e1a861ad8..99e302ca3 100644 --- a/cpu/simple_cpu/simple_cpu.cc +++ b/cpu/simple_cpu/simple_cpu.cc @@ -1,5 +1,5 @@ /* - * Copyright (c) 2003 The Regents of The University of Michigan + * Copyright (c) 2002-2004 The Regents of The University of Michigan * All rights reserved. * * Redistribution and use in source and binary forms, with or without @@ -299,6 +299,7 @@ SimpleCPU::resetStats() void SimpleCPU::serialize(ostream &os) { + BaseCPU::serialize(os); SERIALIZE_ENUM(_status); SERIALIZE_SCALAR(inst); nameOut(os, csprintf("%s.xc", name())); @@ -312,6 +313,7 @@ SimpleCPU::serialize(ostream &os) void SimpleCPU::unserialize(Checkpoint *cp, const string §ion) { + BaseCPU::unserialize(cp, section); UNSERIALIZE_ENUM(_status); UNSERIALIZE_SCALAR(inst); xc->unserialize(cp, csprintf("%s.xc", section)); diff --git a/cpu/simple_cpu/simple_cpu.hh b/cpu/simple_cpu/simple_cpu.hh index 545c753f0..3692ab511 100644 --- a/cpu/simple_cpu/simple_cpu.hh +++ b/cpu/simple_cpu/simple_cpu.hh @@ -1,5 +1,5 @@ /* - * Copyright (c) 2003 The Regents of The University of Michigan + * Copyright (c) 2002-2004 The Regents of The University of Michigan * All rights reserved. * * Redistribution and use in source and binary forms, with or without diff --git a/cpu/static_inst.hh b/cpu/static_inst.hh index 68c30df2f..0315ab7a9 100644 --- a/cpu/static_inst.hh +++ b/cpu/static_inst.hh @@ -1,5 +1,5 @@ /* - * Copyright (c) 2003 The Regents of The University of Michigan + * Copyright (c) 2003-2004 The Regents of The University of Michigan * All rights reserved. * * Redistribution and use in source and binary forms, with or without |