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-rw-r--r--cpu/exec_context.hh4
-rw-r--r--cpu/simple_cpu/simple_cpu.cc2
2 files changed, 3 insertions, 3 deletions
diff --git a/cpu/exec_context.hh b/cpu/exec_context.hh
index 6964b35b8..ddfc53684 100644
--- a/cpu/exec_context.hh
+++ b/cpu/exec_context.hh
@@ -245,9 +245,9 @@ class ExecContext
// stores (WH64?)
// Unsuccesful Store Conditionals would have returned above,
// and wouldn't fall through
- for(int i = 0; i < system->xcvec.size(); i++){
+ for (int i = 0; i < system->xcvec.size(); i++){
cregs = &system->xcvec[i]->regs.miscRegs;
- if((cregs->lock_addr & ~0xf) == (req->paddr & ~0xf)) {
+ if ((cregs->lock_addr & ~0xf) == (req->paddr & ~0xf)) {
cregs->lock_flag = false;
}
}
diff --git a/cpu/simple_cpu/simple_cpu.cc b/cpu/simple_cpu/simple_cpu.cc
index 8da4b1641..f4fc1b823 100644
--- a/cpu/simple_cpu/simple_cpu.cc
+++ b/cpu/simple_cpu/simple_cpu.cc
@@ -535,7 +535,7 @@ SimpleCPU::tick()
}
uint64_t interrupts = xc->cpu->intr_status();
- for(int i = TheISA::INTLEVEL_EXTERNAL_MIN;
+ for (int i = TheISA::INTLEVEL_EXTERNAL_MIN;
i < TheISA::INTLEVEL_EXTERNAL_MAX; i++) {
if (interrupts & (ULL(1) << i)) {
// See table 4-19 of 21164 hardware reference