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-rw-r--r--cpu/exec_context.cc12
-rw-r--r--cpu/exec_context.hh9
-rw-r--r--cpu/o3/alpha_cpu_impl.hh9
-rw-r--r--cpu/ozone/cpu.hh2
-rw-r--r--cpu/simple/cpu.cc4
-rw-r--r--cpu/simple/cpu.hh2
6 files changed, 9 insertions, 29 deletions
diff --git a/cpu/exec_context.cc b/cpu/exec_context.cc
index 7dd9bf58d..e0ab1007f 100644
--- a/cpu/exec_context.cc
+++ b/cpu/exec_context.cc
@@ -253,15 +253,3 @@ ExecContext::regStats(const string &name)
#endif
}
-void
-ExecContext::trap(Fault fault)
-{
- //TheISA::trap(fault); //One possible way to do it...
-
- /** @todo: Going to hack it for now. Do a true fixup later. */
-#if FULL_SYSTEM
- fault->ev5_trap(this);
-#else
- fatal("fault (%d) detected @ PC 0x%08p", fault, readPC());
-#endif
-}
diff --git a/cpu/exec_context.hh b/cpu/exec_context.hh
index d8ec88537..bc3551b4f 100644
--- a/cpu/exec_context.hh
+++ b/cpu/exec_context.hh
@@ -447,18 +447,9 @@ class ExecContext
void setIntrFlag(int val) { regs.intrflag = val; }
Fault hwrei();
bool inPalMode() { return AlphaISA::PcPAL(regs.pc); }
- void ev5_temp_trap(Fault fault);
bool simPalCheck(int palFunc);
#endif
- /** Meant to be more generic trap function to be
- * called when an instruction faults.
- * @param fault The fault generated by executing the instruction.
- * @todo How to do this properly so it's dependent upon ISA only?
- */
-
- void trap(Fault fault);
-
#if !FULL_SYSTEM
TheISA::IntReg getSyscallArg(int i)
{
diff --git a/cpu/o3/alpha_cpu_impl.hh b/cpu/o3/alpha_cpu_impl.hh
index daa61bb1c..a1c659b51 100644
--- a/cpu/o3/alpha_cpu_impl.hh
+++ b/cpu/o3/alpha_cpu_impl.hh
@@ -302,7 +302,7 @@ template <class Impl>
void
AlphaFullCPU<Impl>::trap(Fault fault)
{
- // Keep in mind that a trap may be initiated by fetch if there's a TLB
+/* // Keep in mind that a trap may be initiated by fetch if there's a TLB
// miss
uint64_t PC = this->commit.readCommitPC();
@@ -318,8 +318,9 @@ AlphaFullCPU<Impl>::trap(Fault fault)
if (!fault->isA<InterruptFault>() || !inPalMode(PC))
this->regFile.miscRegs.setReg(AlphaISA::IPR_EXC_ADDR, PC);
- if (fault->isA<PalFault>() || fault->isA<ArithmeticFault>() /* ||
- fault == InterruptFault && !PC_PAL(regs.pc) */) {
+ if (fault->isA<PalFault>() || fault->isA<ArithmeticFault>())
+ // || fault == InterruptFault && !PC_PAL(regs.pc)
+ {
// traps... skip faulting instruction
AlphaISA::MiscReg ipr_exc_addr =
this->regFile.miscRegs.readReg(AlphaISA::IPR_EXC_ADDR);
@@ -332,7 +333,7 @@ AlphaFullCPU<Impl>::trap(Fault fault)
this->regFile.setPC(this->regFile.miscRegs.readReg(AlphaISA::IPR_PAL_BASE) +
(dynamic_cast<AlphaFault *>(fault.get()))->vect());
- this->regFile.setNextPC(PC + sizeof(MachInst));
+ this->regFile.setNextPC(PC + sizeof(MachInst));*/
}
template <class Impl>
diff --git a/cpu/ozone/cpu.hh b/cpu/ozone/cpu.hh
index 667e2b3f8..f5d84d656 100644
--- a/cpu/ozone/cpu.hh
+++ b/cpu/ozone/cpu.hh
@@ -517,7 +517,7 @@ class OoOCPU : public BaseCPU
int readIntrFlag() { return xc->readIntrFlag(); }
void setIntrFlag(int val) { xc->setIntrFlag(val); }
bool inPalMode() { return xc->inPalMode(); }
- void ev5_trap(Fault fault) { xc->ev5_trap(fault); }
+ void trap(Fault fault) { fault->invoke(xc); }
bool simPalCheck(int palFunc) { return xc->simPalCheck(palFunc); }
#else
void syscall() { xc->syscall(); }
diff --git a/cpu/simple/cpu.cc b/cpu/simple/cpu.cc
index ca5d54694..b547e9432 100644
--- a/cpu/simple/cpu.cc
+++ b/cpu/simple/cpu.cc
@@ -688,7 +688,7 @@ SimpleCPU::tick()
if (ipl && ipl > xc->readMiscReg(IPR_IPLR)) {
xc->setMiscReg(IPR_ISR, summary);
xc->setMiscReg(IPR_INTID, ipl);
- (new InterruptFault)->ev5_trap(xc);
+ Fault(new InterruptFault)->invoke(xc);
DPRINTF(Flow, "Interrupt! IPLR=%d ipl=%d summary=%x\n",
xc->readMiscReg(IPR_IPLR), ipl, summary);
@@ -812,7 +812,7 @@ SimpleCPU::tick()
if (fault != NoFault) {
#if FULL_SYSTEM
- fault->ev5_trap(xc);
+ fault->invoke(xc);
#else // !FULL_SYSTEM
fatal("fault (%d) detected @ PC 0x%08p", fault, xc->regs.pc);
#endif // FULL_SYSTEM
diff --git a/cpu/simple/cpu.hh b/cpu/simple/cpu.hh
index 243172821..0b8d84e53 100644
--- a/cpu/simple/cpu.hh
+++ b/cpu/simple/cpu.hh
@@ -347,7 +347,7 @@ class SimpleCPU : public BaseCPU
int readIntrFlag() { return xc->readIntrFlag(); }
void setIntrFlag(int val) { xc->setIntrFlag(val); }
bool inPalMode() { return xc->inPalMode(); }
- void ev5_trap(Fault fault) { fault->ev5_trap(xc); }
+ void trap(Fault fault) { fault->invoke(xc); }
bool simPalCheck(int palFunc) { return xc->simPalCheck(palFunc); }
#else
void syscall() { xc->syscall(); }