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-rw-r--r--cpu/base_cpu.cc6
-rw-r--r--cpu/simple_cpu/simple_cpu.cc12
2 files changed, 4 insertions, 14 deletions
diff --git a/cpu/base_cpu.cc b/cpu/base_cpu.cc
index 367662f25..e00de8389 100644
--- a/cpu/base_cpu.cc
+++ b/cpu/base_cpu.cc
@@ -237,10 +237,4 @@ BaseCPU::clear_interrupts()
#endif // FULL_SYSTEM
-//
-// This declaration is not needed now that SamplingCPU provides a
-// BaseCPUBuilder object.
-//
-#if 0
DEFINE_SIM_OBJECT_CLASS_NAME("BaseCPU", BaseCPU)
-#endif
diff --git a/cpu/simple_cpu/simple_cpu.cc b/cpu/simple_cpu/simple_cpu.cc
index c2796efd0..711c81c51 100644
--- a/cpu/simple_cpu/simple_cpu.cc
+++ b/cpu/simple_cpu/simple_cpu.cc
@@ -116,7 +116,7 @@ SimpleCPU::SimpleCPU(const string &_name,
Counter max_insts_all_threads,
Counter max_loads_any_thread,
Counter max_loads_all_threads,
- AlphaItb *itb, AlphaDtb *dtb,
+ AlphaITB *itb, AlphaDTB *dtb,
FunctionalMemory *mem,
MemInterface *icache_interface,
MemInterface *dcache_interface,
@@ -778,8 +778,8 @@ BEGIN_DECLARE_SIM_OBJECT_PARAMS(SimpleCPU)
Param<Counter> max_loads_all_threads;
#ifdef FULL_SYSTEM
- SimObjectParam<AlphaItb *> itb;
- SimObjectParam<AlphaDtb *> dtb;
+ SimObjectParam<AlphaITB *> itb;
+ SimObjectParam<AlphaDTB *> dtb;
SimObjectParam<FunctionalMemory *> mem;
SimObjectParam<System *> system;
Param<int> mult;
@@ -852,11 +852,7 @@ CREATE_SIM_OBJECT(SimpleCPU)
defer_registration);
#endif // FULL_SYSTEM
-#if 0
- if (!defer_registration) {
- cpu->registerExecContexts();
- }
-#endif
+
return cpu;
}