diff options
Diffstat (limited to 'cpu')
| -rw-r--r-- | cpu/exec_context.hh | 18 | ||||
| -rw-r--r-- | cpu/memtest/memtest.cc | 2 | ||||
| -rw-r--r-- | cpu/memtest/memtest.hh | 4 |
3 files changed, 12 insertions, 12 deletions
diff --git a/cpu/exec_context.hh b/cpu/exec_context.hh index f3c4b8015..b49db9720 100644 --- a/cpu/exec_context.hh +++ b/cpu/exec_context.hh @@ -189,17 +189,17 @@ class ExecContext int getInstAsid() { return ITB_ASN_ASN(regs.ipr[TheISA::IPR_ITB_ASN]); } int getDataAsid() { return DTB_ASN_ASN(regs.ipr[TheISA::IPR_DTB_ASN]); } - Fault translateInstReq(MemReqPtr req) + Fault translateInstReq(MemReqPtr &req) { return itb->translate(req); } - Fault translateDataReadReq(MemReqPtr req) + Fault translateDataReadReq(MemReqPtr &req) { return dtb->translate(req, false); } - Fault translateDataWriteReq(MemReqPtr req) + Fault translateDataWriteReq(MemReqPtr &req) { return dtb->translate(req, true); } @@ -214,7 +214,7 @@ class ExecContext int getInstAsid() { return asid; } int getDataAsid() { return asid; } - Fault dummyTranslation(MemReqPtr req) + Fault dummyTranslation(MemReqPtr &req) { #if 0 assert((req->vaddr >> 48 & 0xffff) == 0); @@ -225,15 +225,15 @@ class ExecContext req->paddr = req->paddr | (Addr)req->asid << sizeof(Addr) * 8 - 16; return No_Fault; } - Fault translateInstReq(MemReqPtr req) + Fault translateInstReq(MemReqPtr &req) { return dummyTranslation(req); } - Fault translateDataReadReq(MemReqPtr req) + Fault translateDataReadReq(MemReqPtr &req) { return dummyTranslation(req); } - Fault translateDataWriteReq(MemReqPtr req) + Fault translateDataWriteReq(MemReqPtr &req) { return dummyTranslation(req); } @@ -241,7 +241,7 @@ class ExecContext #endif template <class T> - Fault read(MemReqPtr req, T& data) + Fault read(MemReqPtr &req, T& data) { #if defined(TARGET_ALPHA) && defined(FULL_SYSTEM) if (req->flags & LOCKED) { @@ -254,7 +254,7 @@ class ExecContext } template <class T> - Fault write(MemReqPtr req, T& data) + Fault write(MemReqPtr &req, T& data) { #if defined(TARGET_ALPHA) && defined(FULL_SYSTEM) diff --git a/cpu/memtest/memtest.cc b/cpu/memtest/memtest.cc index db24bb507..4ec5eed59 100644 --- a/cpu/memtest/memtest.cc +++ b/cpu/memtest/memtest.cc @@ -119,7 +119,7 @@ printData(ostream &os, uint8_t *data, int nbytes) } void -MemTest::completeRequest(MemReqPtr req, uint8_t *data) +MemTest::completeRequest(MemReqPtr &req, uint8_t *data) { switch (req->cmd) { case Read: diff --git a/cpu/memtest/memtest.hh b/cpu/memtest/memtest.hh index 3e7dff968..09f22a177 100644 --- a/cpu/memtest/memtest.hh +++ b/cpu/memtest/memtest.hh @@ -108,7 +108,7 @@ class MemTest : public BaseCPU Statistics::Scalar<> numCopies; // called by MemCompleteEvent::process() - void completeRequest(MemReqPtr req, uint8_t *data); + void completeRequest(MemReqPtr &req, uint8_t *data); friend class MemCompleteEvent; }; @@ -122,7 +122,7 @@ class MemCompleteEvent : public Event public: - MemCompleteEvent(MemReqPtr _req, uint8_t *_data, MemTest *_tester) + MemCompleteEvent(MemReqPtr &_req, uint8_t *_data, MemTest *_tester) : Event(&mainEventQueue), req(_req), data(_data), tester(_tester) { |