1 files changed, 26 insertions, 35 deletions

diff --git a/dev/alpha_console.cc b/dev/alpha_console.cc
index 61b444628..6ca5e3a06 100644
--- a/dev/alpha_console.cc
+++ b/dev/alpha_console.cc
@@ -34,6 +34,7 @@
 #include <cstdio>
 #include <string>
 
+#include "arch/alpha/system.hh"
 #include "base/inifile.hh"
 #include "base/str.hh"
 #include "base/trace.hh"
@@ -50,12 +51,12 @@
 #include "mem/functional/physical.hh"
 #include "sim/builder.hh"
 #include "sim/sim_object.hh"
-#include "sim/system.hh"
 
 using namespace std;
+using namespace AlphaISA;
 
 AlphaConsole::AlphaConsole(const string &name, SimConsole *cons, SimpleDisk *d,
-                           System *s, BaseCPU *c, Platform *p,
+                           AlphaSystem *s, BaseCPU *c, Platform *p,
                            MemoryController *mmu, Addr a,
                            HierParams *hier, Bus *pio_bus)
     : PioDevice(name, p), disk(d), console(cons), system(s), cpu(c), addr(a)
@@ -80,9 +81,7 @@ AlphaConsole::AlphaConsole(const string &name, SimConsole *cons, SimpleDisk *d,
     alphaAccess->diskOperation = 0;
     alphaAccess->outputChar = 0;
     alphaAccess->inputChar = 0;
-    alphaAccess->bootStrapImpure = 0;
-    alphaAccess->bootStrapCPU = 0;
-    alphaAccess->align2 = 0;
+    bzero(alphaAccess->cpuStack, sizeof(alphaAccess->cpuStack));
 
     system->setAlphaAccess(addr);
 }
@@ -122,9 +121,6 @@ AlphaConsole::read(MemReqPtr &req, uint8_t *data)
                 case offsetof(AlphaAccess, numCPUs):
                     *(uint32_t*)data = alphaAccess->numCPUs;
                     break;
-                case offsetof(AlphaAccess, bootStrapCPU):
-                    *(uint32_t*)data = alphaAccess->bootStrapCPU;
-                    break;
                 case offsetof(AlphaAccess, intrClockFrequency):
                     *(uint32_t*)data = alphaAccess->intrClockFrequency;
                     break;
@@ -175,18 +171,21 @@ AlphaConsole::read(MemReqPtr &req, uint8_t *data)
                 case offsetof(AlphaAccess, outputChar):
                     *(uint64_t*)data = alphaAccess->outputChar;
                     break;
-                case offsetof(AlphaAccess, bootStrapImpure):
-                    *(uint64_t*)data = alphaAccess->bootStrapImpure;
-                    break;
                 default:
-                    panic("Unknown 64bit access, %#x\n", daddr);
+                    int cpunum = (daddr - offsetof(AlphaAccess, cpuStack)) /
+                                 sizeof(alphaAccess->cpuStack[0]);
+
+                    if (cpunum >= 0 && cpunum < 64)
+                        *(uint64_t*)data = alphaAccess->cpuStack[cpunum];
+                    else
+                        panic("Unknown 64bit access, %#x\n", daddr);
             }
             break;
         default:
-            return Machine_Check_Fault;
+            return genMachineCheckFault();
     }
 
-    return No_Fault;
+    return NoFault;
 }
 
 Fault
@@ -203,7 +202,7 @@ AlphaConsole::write(MemReqPtr &req, const uint8_t *data)
         val = *(uint64_t *)data;
         break;
       default:
-        return Machine_Check_Fault;
+        return genMachineCheckFault();
     }
 
     Addr daddr = req->paddr - (addr & EV5::PAddrImplMask);
@@ -239,27 +238,21 @@ AlphaConsole::write(MemReqPtr &req, const uint8_t *data)
         console->out((char)(val & 0xff));
         break;
 
-      case offsetof(AlphaAccess, bootStrapImpure):
-        alphaAccess->bootStrapImpure = val;
-        break;
-
-      case offsetof(AlphaAccess, bootStrapCPU):
-        warn("%d: Trying to launch another CPU!", curTick);
-        assert(val > 0 && "Must not access primary cpu");
-
-        other_xc = req->xc->system->execContexts[val];
-        other_xc->regs.intRegFile[16] = val;
-        other_xc->regs.ipr[TheISA::IPR_PALtemp16] = val;
-        other_xc->regs.intRegFile[0] = val;
-        other_xc->regs.intRegFile[30] = alphaAccess->bootStrapImpure;
         other_xc->activate(); //Start the cpu
         break;
 
       default:
-        return Machine_Check_Fault;
+        int cpunum = (daddr - offsetof(AlphaAccess, cpuStack)) /
+                     sizeof(alphaAccess->cpuStack[0]);
+        warn("%d: Trying to launch CPU number %d!", curTick, cpunum);
+        assert(val > 0 && "Must not access primary cpu");
+        if (cpunum >= 0 && cpunum < 64)
+            alphaAccess->cpuStack[cpunum] = val;
+        else
+            panic("Unknown 64bit access, %#x\n", daddr);
     }
 
-    return No_Fault;
+    return NoFault;
 }
 
 Tick
@@ -287,8 +280,7 @@ AlphaConsole::Access::serialize(ostream &os)
     SERIALIZE_SCALAR(diskOperation);
     SERIALIZE_SCALAR(outputChar);
     SERIALIZE_SCALAR(inputChar);
-    SERIALIZE_SCALAR(bootStrapImpure);
-    SERIALIZE_SCALAR(bootStrapCPU);
+    SERIALIZE_ARRAY(cpuStack,64);
 }
 
 void
@@ -310,8 +302,7 @@ AlphaConsole::Access::unserialize(Checkpoint *cp, const std::string &section)
     UNSERIALIZE_SCALAR(diskOperation);
     UNSERIALIZE_SCALAR(outputChar);
     UNSERIALIZE_SCALAR(inputChar);
-    UNSERIALIZE_SCALAR(bootStrapImpure);
-    UNSERIALIZE_SCALAR(bootStrapCPU);
+    UNSERIALIZE_ARRAY(cpuStack, 64);
 }
 
 void
@@ -332,7 +323,7 @@ BEGIN_DECLARE_SIM_OBJECT_PARAMS(AlphaConsole)
     SimObjectParam<SimpleDisk *> disk;
     SimObjectParam<MemoryController *> mmu;
     Param<Addr> addr;
-    SimObjectParam<System *> system;
+    SimObjectParam<AlphaSystem *> system;
     SimObjectParam<BaseCPU *> cpu;
     SimObjectParam<Platform *> platform;
     SimObjectParam<Bus*> pio_bus;