diff options
Diffstat (limited to 'dev/isa_fake.cc')
-rw-r--r-- | dev/isa_fake.cc | 105 |
1 files changed, 43 insertions, 62 deletions
diff --git a/dev/isa_fake.cc b/dev/isa_fake.cc index 2afebbded..2f392a41a 100644 --- a/dev/isa_fake.cc +++ b/dev/isa_fake.cc @@ -35,106 +35,87 @@ #include <vector> #include "base/trace.hh" -#include "cpu/exec_context.hh" #include "dev/isa_fake.hh" -#include "mem/bus/bus.hh" -#include "mem/bus/pio_interface.hh" -#include "mem/bus/pio_interface_impl.hh" -#include "mem/functional/memory_control.hh" +#include "mem/packet.hh" #include "sim/builder.hh" #include "sim/system.hh" using namespace std; -using namespace TheISA; -IsaFake::IsaFake(const string &name, Addr a, MemoryController *mmu, - HierParams *hier, Bus *pio_bus, Addr size) - : PioDevice(name, NULL), addr(a) +IsaFake::IsaFake(Params *p) + : BasicPioDevice(p) { - mmu->add_child(this, RangeSize(addr, size)); - - if (pio_bus) { - pioInterface = newPioInterface(name + ".pio", hier, pio_bus, this, - &IsaFake::cacheAccess); - pioInterface->addAddrRange(RangeSize(addr, size)); - } + pioSize = p->pio_size; } -Fault -IsaFake::read(MemReqPtr &req, uint8_t *data) +Tick +IsaFake::read(Packet &pkt) { - DPRINTF(Tsunami, "read va=%#x size=%d\n", - req->vaddr, req->size); + assert(pkt.result == Unknown); + assert(pkt.addr >= pioAddr && pkt.addr < pioAddr + pioSize); -#if TRACING_ON - Addr daddr = (req->paddr - (addr & EV5::PAddrImplMask)) >> 6; -#endif + pkt.time += pioDelay; - switch (req->size) { + DPRINTF(Tsunami, "read va=%#x size=%d\n", pkt.addr, pkt.size); - case sizeof(uint64_t): - *(uint64_t*)data = 0xFFFFFFFFFFFFFFFFULL; - return NoFault; + switch (pkt.size) { + pkt.set(0xFFFFFFFFFFFFFFFFULL); + break; case sizeof(uint32_t): - *(uint32_t*)data = 0xFFFFFFFF; - return NoFault; + pkt.set((uint32_t)0xFFFFFFFF); + break; case sizeof(uint16_t): - *(uint16_t*)data = 0xFFFF; - return NoFault; + pkt.set((uint16_t)0xFFFF); + break; case sizeof(uint8_t): - *(uint8_t*)data = 0xFF; - return NoFault; - + pkt.set((uint8_t)0xFF); + break; default: panic("invalid access size(?) for PCI configspace!\n"); } - DPRINTFN("Isa FakeSMC ERROR: read daddr=%#x size=%d\n", daddr, req->size); - - return NoFault; -} - -Fault -IsaFake::write(MemReqPtr &req, const uint8_t *data) -{ - DPRINTF(Tsunami, "write - va=%#x size=%d \n", - req->vaddr, req->size); - - //:Addr daddr = (req->paddr & addr_mask) >> 6; - - return NoFault; + pkt.result = Success; + return pioDelay; } Tick -IsaFake::cacheAccess(MemReqPtr &req) +IsaFake::write(Packet &pkt) { - return curTick; + pkt.time += pioDelay; + DPRINTF(Tsunami, "write - va=%#x size=%d \n", pkt.addr, pkt.size); + pkt.result = Success; + return pioDelay; } BEGIN_DECLARE_SIM_OBJECT_PARAMS(IsaFake) - SimObjectParam<MemoryController *> mmu; - Param<Addr> addr; - SimObjectParam<Bus*> pio_bus; + Param<Addr> pio_addr; Param<Tick> pio_latency; - SimObjectParam<HierParams *> hier; - Param<Addr> size; + Param<Addr> pio_size; + SimObjectParam<Platform *> platform; + SimObjectParam<System *> system; END_DECLARE_SIM_OBJECT_PARAMS(IsaFake) BEGIN_INIT_SIM_OBJECT_PARAMS(IsaFake) - INIT_PARAM(mmu, "Memory Controller"), - INIT_PARAM(addr, "Device Address"), - INIT_PARAM_DFLT(pio_bus, "The IO Bus to attach to", NULL), - INIT_PARAM_DFLT(pio_latency, "Programmed IO latency", 1000), - INIT_PARAM_DFLT(hier, "Hierarchy global variables", &defaultHierParams), - INIT_PARAM_DFLT(size, "Size of address range", 0x8) + INIT_PARAM(pio_addr, "Device Address"), + INIT_PARAM(pio_latency, "Programmed IO latency"), + INIT_PARAM(pio_size, "Size of address range"), + INIT_PARAM(platform, "platform"), + INIT_PARAM(system, "system object") END_INIT_SIM_OBJECT_PARAMS(IsaFake) CREATE_SIM_OBJECT(IsaFake) { - return new IsaFake(getInstanceName(), addr, mmu, hier, pio_bus, size); + IsaFake::Params *p = new IsaFake::Params; + p->name = getInstanceName(); + p->pio_addr = pio_addr; + p->pio_delay = pio_latency; + p->pio_size = pio_size; + p->platform = platform; + p->system = system; + return new IsaFake(p); } REGISTER_SIM_OBJECT("IsaFake", IsaFake) |