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Diffstat (limited to 'dev/ns_gige.cc')
-rw-r--r--dev/ns_gige.cc62
1 files changed, 31 insertions, 31 deletions
diff --git a/dev/ns_gige.cc b/dev/ns_gige.cc
index 82b14388c..5e27db58d 100644
--- a/dev/ns_gige.cc
+++ b/dev/ns_gige.cc
@@ -488,17 +488,17 @@ NSGigE::writeConfig(int offset, const uint16_t data)
* spec sheet
*/
Tick
-NSGigE::read(Packet &pkt)
+NSGigE::read(Packet *pkt)
{
assert(ioEnable);
- pkt.time += pioDelay;
- pkt.allocate();
+ pkt->time += pioDelay;
+ pkt->allocate();
//The mask is to give you only the offset into the device register file
- Addr daddr = pkt.addr & 0xfff;
+ Addr daddr = pkt->addr & 0xfff;
DPRINTF(EthernetPIO, "read da=%#x pa=%#x size=%d\n",
- daddr, pkt.addr, pkt.size);
+ daddr, pkt->addr, pkt->size);
// there are some reserved registers, you can see ns_gige_reg.h and
@@ -506,26 +506,26 @@ NSGigE::read(Packet &pkt)
if (daddr > LAST && daddr <= RESERVED) {
panic("Accessing reserved register");
} else if (daddr > RESERVED && daddr <= 0x3FC) {
- if (pkt.size == sizeof(uint8_t))
- readConfig(daddr & 0xff, pkt.getPtr<uint8_t>());
- if (pkt.size == sizeof(uint16_t))
- readConfig(daddr & 0xff, pkt.getPtr<uint16_t>());
- if (pkt.size == sizeof(uint32_t))
- readConfig(daddr & 0xff, pkt.getPtr<uint32_t>());
- pkt.result = Success;
+ if (pkt->size == sizeof(uint8_t))
+ readConfig(daddr & 0xff, pkt->getPtr<uint8_t>());
+ if (pkt->size == sizeof(uint16_t))
+ readConfig(daddr & 0xff, pkt->getPtr<uint16_t>());
+ if (pkt->size == sizeof(uint32_t))
+ readConfig(daddr & 0xff, pkt->getPtr<uint32_t>());
+ pkt->result = Success;
return pioDelay;
} else if (daddr >= MIB_START && daddr <= MIB_END) {
// don't implement all the MIB's. hopefully the kernel
// doesn't actually DEPEND upon their values
// MIB are just hardware stats keepers
- pkt.set<uint32_t>(0);
- pkt.result = Success;
+ pkt->set<uint32_t>(0);
+ pkt->result = Success;
return pioDelay;
} else if (daddr > 0x3FC)
panic("Something is messed up!\n");
- assert(pkt.size == sizeof(uint32_t));
- uint32_t &reg = *pkt.getPtr<uint32_t>();
+ assert(pkt->size == sizeof(uint32_t));
+ uint32_t &reg = *pkt->getPtr<uint32_t>();
uint16_t rfaddr;
switch (daddr) {
@@ -715,37 +715,37 @@ NSGigE::read(Packet &pkt)
DPRINTF(EthernetPIO, "read from %#x: data=%d data=%#x\n",
daddr, reg, reg);
- pkt.result = Success;
+ pkt->result = Success;
return pioDelay;
}
Tick
-NSGigE::write(Packet &pkt)
+NSGigE::write(Packet *pkt)
{
assert(ioEnable);
- Addr daddr = pkt.addr & 0xfff;
+ Addr daddr = pkt->addr & 0xfff;
DPRINTF(EthernetPIO, "write da=%#x pa=%#x size=%d\n",
- daddr, pkt.addr, pkt.size);
+ daddr, pkt->addr, pkt->size);
- pkt.time += pioDelay;
+ pkt->time += pioDelay;
if (daddr > LAST && daddr <= RESERVED) {
panic("Accessing reserved register");
} else if (daddr > RESERVED && daddr <= 0x3FC) {
- if (pkt.size == sizeof(uint8_t))
- writeConfig(daddr & 0xff, pkt.get<uint8_t>());
- if (pkt.size == sizeof(uint16_t))
- writeConfig(daddr & 0xff, pkt.get<uint16_t>());
- if (pkt.size == sizeof(uint32_t))
- writeConfig(daddr & 0xff, pkt.get<uint32_t>());
- pkt.result = Success;
+ if (pkt->size == sizeof(uint8_t))
+ writeConfig(daddr & 0xff, pkt->get<uint8_t>());
+ if (pkt->size == sizeof(uint16_t))
+ writeConfig(daddr & 0xff, pkt->get<uint16_t>());
+ if (pkt->size == sizeof(uint32_t))
+ writeConfig(daddr & 0xff, pkt->get<uint32_t>());
+ pkt->result = Success;
return pioDelay;
} else if (daddr > 0x3FC)
panic("Something is messed up!\n");
- if (pkt.size == sizeof(uint32_t)) {
- uint32_t reg = pkt.get<uint32_t>();
+ if (pkt->size == sizeof(uint32_t)) {
+ uint32_t reg = pkt->get<uint32_t>();
uint16_t rfaddr;
DPRINTF(EthernetPIO, "write data=%d data=%#x\n", reg, reg);
@@ -1131,7 +1131,7 @@ NSGigE::write(Packet &pkt)
} else {
panic("Invalid Request Size");
}
- pkt.result = Success;
+ pkt->result = Success;
return pioDelay;
}