diff options
Diffstat (limited to 'dev/tsunami_io.hh')
| -rw-r--r-- | dev/tsunami_io.hh | 192 |
1 files changed, 172 insertions, 20 deletions
diff --git a/dev/tsunami_io.hh b/dev/tsunami_io.hh index 90bef2b86..e6a545689 100644 --- a/dev/tsunami_io.hh +++ b/dev/tsunami_io.hh @@ -1,5 +1,5 @@ /* - * Copyright (c) 2003 The Regents of The University of Michigan + * Copyright (c) 2004 The Regents of The University of Michigan * All rights reserved. * * Redistribution and use in source and binary forms, with or without @@ -33,78 +33,173 @@ #ifndef __TSUNAMI_DMA_HH__ #define __TSUNAMI_DMA_HH__ -#define RTC_RATE 1024 - -#include "mem/functional_mem/functional_memory.hh" +#include "dev/io_device.hh" +#include "base/range.hh" #include "dev/tsunami.hh" +/** How often the RTC interrupts */ +static const int RTC_RATE = 1024; + /* - * Tsunami I/O device + * Tsunami I/O device is a catch all for all the south bridge stuff we care + * to implement. */ -class TsunamiIO : public FunctionalMemory +class TsunamiIO : public PioDevice { private: + /** The base address of this device */ Addr addr; + + /** The size of mappad from the above address */ static const Addr size = 0xff; struct tm tm; - // In Tsunami RTC only has two i/o ports - // one for data and one for address, so you - // write the address and then read/write the data + /** In Tsunami RTC only has two i/o ports one for data and one for address, + * so you write the address and then read/write the data. This store the + * address you are going to be reading from on a read. + */ uint8_t RTCAddress; protected: + /** + * The ClockEvent is handles the PIT interrupts + */ class ClockEvent : public Event { protected: + /** how often the PIT fires */ Tick interval; + /** The mode of the PIT */ uint8_t mode; + /** The status of the PIT */ uint8_t status; public: + /** + * Just set the mode to 0 + */ ClockEvent(); + /** + * processs the timer event + */ virtual void process(); + + /** + * Returns a description of this event + * @return the description + */ virtual const char *description(); + + /** + * Schedule a timer interrupt to occur sometime in the future. + */ void Program(int count); + + /** + * Write the mode bits of the PIT. + * @param mode the new mode + */ void ChangeMode(uint8_t mode); + + /** + * The current PIT status. + * @return the status of the PIT + */ uint8_t Status(); - }; + /** + * Serialize this object to the given output stream. + * @param os The stream to serialize to. + */ + virtual void serialize(std::ostream &os); + + /** + * Reconstruct the state of this object from a checkpoint. + * @param cp The checkpoint use. + * @param section The section name of this object + */ + virtual void unserialize(Checkpoint *cp, const std::string §ion); + }; + + /** + * Process RTC timer events and generate interrupts appropriately. + */ class RTCEvent : public Event { protected: - Tsunami* tsunami; + /** A pointer back to tsunami to create interrupt the processor. */ + Tsunami* tsunami; public: - RTCEvent(Tsunami* t); + /** RTC Event initializes the RTC event by scheduling an event + * RTC_RATE times pre second. */ + RTCEvent(Tsunami* t); - virtual void process(); - virtual const char *description(); - }; + /** + * Interrupth the processor and reschedule the event. + * */ + virtual void process(); + + /** + * Return a description of this event. + * @return a description + */ + virtual const char *description(); + /** + * Serialize this object to the given output stream. + * @param os The stream to serialize to. + */ + virtual void serialize(std::ostream &os); + + + /** + * Reconstruct the state of this object from a checkpoint. + * @param cp The checkpoint use. + * @param section The section name of this object + */ + virtual void unserialize(Checkpoint *cp, const std::string §ion); + }; + + /** uip UpdateInProgess says that the rtc is updating, but we just fake it + * by alternating it on every read of the bit since we are going to + * override the loop_per_jiffy time that it is trying to use the UIP to + * calculate. + */ uint8_t uip; + /** Mask of the PIC1 */ uint8_t mask1; + + /** Mask of the PIC2 */ uint8_t mask2; + + /** Mode of PIC1. Not used for anything */ uint8_t mode1; + + /** Mode of PIC2. Not used for anything */ uint8_t mode2; - uint8_t picr; //Raw PIC interrput register, before masking + /** Raw PIC interrupt register before masking */ + uint8_t picr; //Raw PIC interrput register + + /** Is the pic interrupting right now or not. */ bool picInterrupting; + /** A pointer to the Tsunami device which be belong to */ Tsunami *tsunami; - /* + /** * This timer is initilized, but after I wrote the code * it doesn't seem to be used again, and best I can tell * it too is not connected to any interrupt port */ ClockEvent timer0; - /* + /** * This timer is used to control the speaker, which * we normally could care less about, however it is * also used to calculated the clockspeed and hense @@ -114,27 +209,84 @@ class TsunamiIO : public FunctionalMemory */ ClockEvent timer2; + /** This is the event used to interrupt the cpu like an RTC. */ RTCEvent rtc; + /** The interval is set via two writes to the PIT. + * This variable contains a flag as to how many writes have happened, and + * the time so far. + */ uint32_t timerData; public: - uint32_t frequency() const { return RTC_RATE; } + /** + * Return the freqency of the RTC + * @return interrupt rate of the RTC + */ + Tick frequency() const { return RTC_RATE; } + + /** + * Initialize all the data for devices supported by Tsunami I/O. + * @param name name of this device. + * @param t pointer back to the Tsunami object that we belong to. + * @param init_time Time (as in seconds since 1970) to set RTC to. + * @param a address we are mapped at. + * @param mmu pointer to the memory controller that sends us events. + */ TsunamiIO(const std::string &name, Tsunami *t, time_t init_time, - Addr a, MemoryController *mmu); + Addr a, MemoryController *mmu, HierParams *hier, Bus *bus); + /** + * Create the tm struct from seconds since 1970 + */ void set_time(time_t t); + /** + * Process a read to one of the devices we are emulating. + * @param req Contains the address to read from. + * @param data A pointer to write the read data to. + * @return The fault condition of the access. + */ virtual Fault read(MemReqPtr &req, uint8_t *data); + + /** + * Process a write to one of the devices we emulate. + * @param req Contains the address to write to. + * @param data The data to write. + * @return The fault condition of the access. + */ virtual Fault write(MemReqPtr &req, const uint8_t *data); + /** + * Post an PIC interrupt to the CPU via the CChip + * @param bitvector interrupt to post. + */ void postPIC(uint8_t bitvector); + + /** + * Clear a posted interrupt + * @param bitvector interrupt to clear + */ void clearPIC(uint8_t bitvector); + /** + * Serialize this object to the given output stream. + * @param os The stream to serialize to. + */ virtual void serialize(std::ostream &os); + + + /** + * Reconstruct the state of this object from a checkpoint. + * @param cp The checkpoint use. + * @param section The section name of this object + */ virtual void unserialize(Checkpoint *cp, const std::string §ion); + + + Tick cacheAccess(MemReqPtr &req); }; #endif // __TSUNAMI_IO_HH__ |