summaryrefslogtreecommitdiff
path: root/dev
diff options
context:
space:
mode:
Diffstat (limited to 'dev')
-rw-r--r--dev/alpha_console.cc21
-rw-r--r--dev/alpha_console.hh10
-rw-r--r--dev/etherbus.cc27
-rw-r--r--dev/etherbus.hh4
-rw-r--r--dev/etherlink.cc13
-rw-r--r--dev/etherlink.hh2
-rw-r--r--dev/ethertap.cc7
-rw-r--r--dev/ide_disk.cc14
-rw-r--r--dev/ide_disk.hh2
-rw-r--r--dev/ns_gige.cc21
-rw-r--r--dev/ns_gige.hh5
-rw-r--r--dev/platform.cc9
-rw-r--r--dev/platform.hh16
-rw-r--r--dev/sinic.cc16
-rw-r--r--dev/sinic.hh3
-rw-r--r--dev/tsunami.cc13
-rw-r--r--dev/tsunami.hh2
-rw-r--r--dev/tsunami_io.cc31
-rw-r--r--dev/tsunami_io.hh19
19 files changed, 136 insertions, 99 deletions
diff --git a/dev/alpha_console.cc b/dev/alpha_console.cc
index 8309ea16d..01ce17dd5 100644
--- a/dev/alpha_console.cc
+++ b/dev/alpha_console.cc
@@ -56,10 +56,10 @@
using namespace std;
AlphaConsole::AlphaConsole(const string &name, SimConsole *cons, SimpleDisk *d,
- System *system, BaseCPU *cpu, Platform *p,
+ System *s, BaseCPU *c, Platform *p,
int num_cpus, MemoryController *mmu, Addr a,
HierParams *hier, Bus *bus)
- : PioDevice(name, p), disk(d), console(cons), addr(a)
+ : PioDevice(name, p), disk(d), console(cons), system(s), cpu(c), addr(a)
{
mmu->add_child(this, RangeSize(addr, size));
@@ -71,15 +71,9 @@ AlphaConsole::AlphaConsole(const string &name, SimConsole *cons, SimpleDisk *d,
alphaAccess = new AlphaAccess;
alphaAccess->last_offset = size - 1;
- alphaAccess->kernStart = system->getKernelStart();
- alphaAccess->kernEnd = system->getKernelEnd();
- alphaAccess->entryPoint = system->getKernelEntry();
alphaAccess->version = ALPHA_ACCESS_VERSION;
alphaAccess->numCPUs = num_cpus;
- alphaAccess->mem_size = system->physmem->size();
- alphaAccess->cpuClock = cpu->getFreq() / 1000000;
- alphaAccess->intrClockFrequency = platform->intrFrequency();
alphaAccess->diskUnit = 1;
alphaAccess->diskCount = 0;
@@ -93,6 +87,17 @@ AlphaConsole::AlphaConsole(const string &name, SimConsole *cons, SimpleDisk *d,
alphaAccess->align2 = 0;
}
+void
+AlphaConsole::init()
+{
+ alphaAccess->kernStart = system->getKernelStart();
+ alphaAccess->kernEnd = system->getKernelEnd();
+ alphaAccess->entryPoint = system->getKernelEntry();
+ alphaAccess->mem_size = system->physmem->size();
+ alphaAccess->cpuClock = cpu->frequency() / 1000000; // In MHz
+ alphaAccess->intrClockFrequency = platform->intrFrequency();
+}
+
Fault
AlphaConsole::read(MemReqPtr &req, uint8_t *data)
{
diff --git a/dev/alpha_console.hh b/dev/alpha_console.hh
index 96b0a22c2..5685d7342 100644
--- a/dev/alpha_console.hh
+++ b/dev/alpha_console.hh
@@ -83,16 +83,24 @@ class AlphaConsole : public PioDevice
/** the system console (the terminal) is accessable from the console */
SimConsole *console;
+ /** a pointer to the system we are running in */
+ System *system;
+
+ /** a pointer to the CPU boot cpu */
+ BaseCPU *cpu;
+
Addr addr;
static const Addr size = 0x80; // equal to sizeof(alpha_access);
public:
/** Standard Constructor */
AlphaConsole(const std::string &name, SimConsole *cons, SimpleDisk *d,
- System *system, BaseCPU *cpu, Platform *platform,
+ System *s, BaseCPU *c, Platform *platform,
int num_cpus, MemoryController *mmu, Addr addr,
HierParams *hier, Bus *bus);
+ virtual void init();
+
/**
* memory mapped reads and writes
*/
diff --git a/dev/etherbus.cc b/dev/etherbus.cc
index 82722383c..ab2314c02 100644
--- a/dev/etherbus.cc
+++ b/dev/etherbus.cc
@@ -45,12 +45,12 @@
using namespace std;
-EtherBus::EtherBus(const string &name, double rate, bool loop,
+EtherBus::EtherBus(const string &name, double speed, bool loop,
EtherDump *packet_dump)
- : SimObject(name), ticks_per_byte(rate), loopback(loop),
- event(&mainEventQueue, this),
- sender(0), dump(packet_dump)
-{ }
+ : SimObject(name), ticksPerByte(speed), loopback(loop),
+ event(&mainEventQueue, this), sender(0), dump(packet_dump)
+{
+}
void
EtherBus::txDone()
@@ -93,9 +93,9 @@ EtherBus::send(EtherInt *sndr, PacketPtr &pkt)
packet = pkt;
sender = sndr;
- int delay = (int)ceil(((double)pkt->length * ticks_per_byte) + 1.0);
+ int delay = (int)ceil(((double)pkt->length * ticksPerByte) + 1.0);
DPRINTF(Ethernet, "scheduling packet: delay=%d, (rate=%f)\n",
- delay, ticks_per_byte);
+ delay, ticksPerByte);
event.schedule(curTick + delay);
return true;
@@ -104,25 +104,22 @@ EtherBus::send(EtherInt *sndr, PacketPtr &pkt)
BEGIN_DECLARE_SIM_OBJECT_PARAMS(EtherBus)
Param<bool> loopback;
- Param<int> speed;
+ Param<double> speed;
SimObjectParam<EtherDump *> packet_dump;
END_DECLARE_SIM_OBJECT_PARAMS(EtherBus)
BEGIN_INIT_SIM_OBJECT_PARAMS(EtherBus)
- INIT_PARAM_DFLT(loopback,
- "send the packet back to the interface from which it came",
- true),
- INIT_PARAM_DFLT(speed, "bus speed in bits per second", 100000000),
- INIT_PARAM_DFLT(packet_dump, "object to dump network packets to", NULL)
+ INIT_PARAM(loopback, "send the packet back to the sending interface"),
+ INIT_PARAM(speed, "bus speed in ticks per byte"),
+ INIT_PARAM(packet_dump, "object to dump network packets to")
END_INIT_SIM_OBJECT_PARAMS(EtherBus)
CREATE_SIM_OBJECT(EtherBus)
{
- double rate = ((double)ticksPerSecond * 8.0) / (double)speed;
- return new EtherBus(getInstanceName(), rate, loopback, packet_dump);
+ return new EtherBus(getInstanceName(), speed, loopback, packet_dump);
}
REGISTER_SIM_OBJECT("EtherBus", EtherBus)
diff --git a/dev/etherbus.hh b/dev/etherbus.hh
index 716636c79..2ce118b59 100644
--- a/dev/etherbus.hh
+++ b/dev/etherbus.hh
@@ -44,7 +44,7 @@ class EtherBus : public SimObject
protected:
typedef std::list<EtherInt *> devlist_t;
devlist_t devlist;
- double ticks_per_byte;
+ double ticksPerByte;
bool loopback;
protected:
@@ -66,7 +66,7 @@ class EtherBus : public SimObject
EtherDump *dump;
public:
- EtherBus(const std::string &name, double ticks_per_byte, bool loopback,
+ EtherBus(const std::string &name, double speed, bool loopback,
EtherDump *dump);
virtual ~EtherBus() {}
diff --git a/dev/etherlink.cc b/dev/etherlink.cc
index ba0fa705c..d63f4b3ad 100644
--- a/dev/etherlink.cc
+++ b/dev/etherlink.cc
@@ -48,12 +48,9 @@
using namespace std;
EtherLink::EtherLink(const string &name, EtherInt *peer0, EtherInt *peer1,
- Tick speed, Tick dly, EtherDump *dump)
+ double rate, Tick delay, EtherDump *dump)
: SimObject(name)
{
- double rate = ((double)ticksPerSecond * 8.0) / (double)speed;
- Tick delay = dly * Clock::Int::us;
-
link[0] = new Link(name + ".link0", this, 0, rate, delay, dump);
link[1] = new Link(name + ".link1", this, 1, rate, delay, dump);
@@ -271,7 +268,7 @@ BEGIN_DECLARE_SIM_OBJECT_PARAMS(EtherLink)
SimObjectParam<EtherInt *> int1;
SimObjectParam<EtherInt *> int2;
- Param<Tick> speed;
+ Param<double> speed;
Param<Tick> delay;
SimObjectParam<EtherDump *> dump;
@@ -281,9 +278,9 @@ BEGIN_INIT_SIM_OBJECT_PARAMS(EtherLink)
INIT_PARAM(int1, "interface 1"),
INIT_PARAM(int2, "interface 2"),
- INIT_PARAM_DFLT(speed, "link speed in bits per second", 100000000),
- INIT_PARAM_DFLT(delay, "transmit delay of packets in us", 0),
- INIT_PARAM_DFLT(dump, "object to dump network packets to", NULL)
+ INIT_PARAM(speed, "link speed in bits per second"),
+ INIT_PARAM(delay, "transmit delay of packets in us"),
+ INIT_PARAM(dump, "object to dump network packets to")
END_INIT_SIM_OBJECT_PARAMS(EtherLink)
diff --git a/dev/etherlink.hh b/dev/etherlink.hh
index 28ab61301..e19471343 100644
--- a/dev/etherlink.hh
+++ b/dev/etherlink.hh
@@ -118,7 +118,7 @@ class EtherLink : public SimObject
public:
EtherLink(const std::string &name, EtherInt *peer0, EtherInt *peer1,
- Tick speed, Tick delay, EtherDump *dump);
+ double rate, Tick delay, EtherDump *dump);
virtual ~EtherLink();
virtual void serialize(std::ostream &os);
diff --git a/dev/ethertap.cc b/dev/ethertap.cc
index 807765d91..d0474b115 100644
--- a/dev/ethertap.cc
+++ b/dev/ethertap.cc
@@ -237,9 +237,10 @@ EtherTap::process(int revent)
DPRINTF(Ethernet, "bus busy...buffer for retransmission\n");
packetBuffer.push(packet);
if (!txEvent.scheduled())
- txEvent.schedule(curTick + 1000);
- } else if (dump)
+ txEvent.schedule(curTick + retryTime);
+ } else if (dump) {
dump->dump(packet);
+ }
}
}
@@ -259,7 +260,7 @@ EtherTap::retransmit()
}
if (!packetBuffer.empty() && !txEvent.scheduled())
- txEvent.schedule(curTick + 1000);
+ txEvent.schedule(curTick + retryTime);
}
//=====================================================================
diff --git a/dev/ide_disk.cc b/dev/ide_disk.cc
index 213fc6a97..90a57bd2f 100644
--- a/dev/ide_disk.cc
+++ b/dev/ide_disk.cc
@@ -55,8 +55,8 @@
using namespace std;
IdeDisk::IdeDisk(const string &name, DiskImage *img, PhysicalMemory *phys,
- int id, int delay)
- : SimObject(name), ctrl(NULL), image(img), physmem(phys),
+ int id, Tick delay)
+ : SimObject(name), ctrl(NULL), image(img), physmem(phys), diskDelay(delay),
dmaTransferEvent(this), dmaReadWaitEvent(this),
dmaWriteWaitEvent(this), dmaPrdReadEvent(this),
dmaReadEvent(this), dmaWriteEvent(this)
@@ -64,9 +64,6 @@ IdeDisk::IdeDisk(const string &name, DiskImage *img, PhysicalMemory *phys,
// Reset the device state
reset(id);
- // calculate disk delay in microseconds
- diskDelay = (delay * ticksPerSecond / 100000);
-
// fill out the drive ID structure
memset(&driveID, 0, sizeof(struct hd_driveid));
@@ -354,8 +351,11 @@ IdeDisk::dmaPrdReadDone()
void
IdeDisk::doDmaRead()
{
+ /** @TODO we need to figure out what the delay actually will be */
Tick totalDiskDelay = diskDelay + (curPrd.getByteCount() / SectorSize);
+ DPRINTF(IdeDisk, "doDmaRead, diskDelay: %d totalDiskDelay: %d\n",
+ diskDelay, totalDiskDelay);
if (dmaInterface) {
if (dmaInterface->busy()) {
// reschedule after waiting period
@@ -455,8 +455,12 @@ IdeDisk::dmaReadDone()
void
IdeDisk::doDmaWrite()
{
+ /** @TODO we need to figure out what the delay actually will be */
Tick totalDiskDelay = diskDelay + (curPrd.getByteCount() / SectorSize);
+ DPRINTF(IdeDisk, "doDmaWrite, diskDelay: %d totalDiskDelay: %d\n",
+ diskDelay, totalDiskDelay);
+
if (dmaInterface) {
if (dmaInterface->busy()) {
// reschedule after waiting period
diff --git a/dev/ide_disk.hh b/dev/ide_disk.hh
index 9c6eea623..703625595 100644
--- a/dev/ide_disk.hh
+++ b/dev/ide_disk.hh
@@ -248,7 +248,7 @@ class IdeDisk : public SimObject
* @param disk_delay The disk delay in milliseconds
*/
IdeDisk(const std::string &name, DiskImage *img, PhysicalMemory *phys,
- int id, int disk_delay);
+ int id, Tick disk_delay);
/**
* Delete the data buffer.
diff --git a/dev/ns_gige.cc b/dev/ns_gige.cc
index bc3103540..47631642c 100644
--- a/dev/ns_gige.cc
+++ b/dev/ns_gige.cc
@@ -94,8 +94,8 @@ NSGigE::NSGigE(Params *p)
: PciDev(p), ioEnable(false),
txFifo(p->tx_fifo_size), rxFifo(p->rx_fifo_size),
txPacket(0), rxPacket(0), txPacketBufPtr(NULL), rxPacketBufPtr(NULL),
- txXferLen(0), rxXferLen(0), txState(txIdle), txEnable(false),
- CTDD(false),
+ txXferLen(0), rxXferLen(0), cycleTime(p->cycle_time),
+ txState(txIdle), txEnable(false), CTDD(false),
txFragPtr(0), txDescCnt(0), txDmaState(dmaIdle), rxState(rxIdle),
rxEnable(false), CRDD(false), rxPktBytes(0),
rxFragPtr(0), rxDescCnt(0), rxDmaState(dmaIdle), extstsEnable(false),
@@ -138,7 +138,7 @@ NSGigE::NSGigE(Params *p)
}
- intrDelay = p->intr_delay * Clock::Int::us;
+ intrDelay = p->intr_delay;
dmaReadDelay = p->dma_read_delay;
dmaWriteDelay = p->dma_write_delay;
dmaReadFactor = p->dma_read_factor;
@@ -1833,7 +1833,7 @@ NSGigE::transmit()
if (!txFifo.empty() && !txEvent.scheduled()) {
DPRINTF(Ethernet, "reschedule transmit\n");
- txEvent.schedule(curTick + 1000);
+ txEvent.schedule(curTick + retryTime);
}
}
@@ -2231,9 +2231,9 @@ NSGigE::transferDone()
DPRINTF(Ethernet, "transfer complete: data in txFifo...schedule xmit\n");
if (txEvent.scheduled())
- txEvent.reschedule(curTick + 1);
+ txEvent.reschedule(curTick + cycles(1));
else
- txEvent.schedule(curTick + 1);
+ txEvent.schedule(curTick + cycles(1));
}
bool
@@ -2682,6 +2682,7 @@ REGISTER_SIM_OBJECT("NSGigEInt", NSGigEInt)
BEGIN_DECLARE_SIM_OBJECT_PARAMS(NSGigE)
Param<Addr> addr;
+ Param<Tick> cycle_time;
Param<Tick> tx_delay;
Param<Tick> rx_delay;
Param<Tick> intr_delay;
@@ -2713,9 +2714,10 @@ END_DECLARE_SIM_OBJECT_PARAMS(NSGigE)
BEGIN_INIT_SIM_OBJECT_PARAMS(NSGigE)
INIT_PARAM(addr, "Device Address"),
- INIT_PARAM_DFLT(tx_delay, "Transmit Delay", 1000),
- INIT_PARAM_DFLT(rx_delay, "Receive Delay", 1000),
- INIT_PARAM_DFLT(intr_delay, "Interrupt Delay in microseconds", 0),
+ INIT_PARAM(cycle_time, "State machine processor frequency"),
+ INIT_PARAM(tx_delay, "Transmit Delay"),
+ INIT_PARAM(rx_delay, "Receive Delay"),
+ INIT_PARAM(intr_delay, "Interrupt Delay in microseconds"),
INIT_PARAM(mmu, "Memory Controller"),
INIT_PARAM(physmem, "Physical Memory"),
INIT_PARAM_DFLT(rx_filter, "Enable Receive Filter", true),
@@ -2756,6 +2758,7 @@ CREATE_SIM_OBJECT(NSGigE)
params->deviceNum = pci_dev;
params->functionNum = pci_func;
+ params->cycle_time = cycle_time;
params->intr_delay = intr_delay;
params->pmem = physmem;
params->tx_delay = tx_delay;
diff --git a/dev/ns_gige.hh b/dev/ns_gige.hh
index 58060edac..544a300c3 100644
--- a/dev/ns_gige.hh
+++ b/dev/ns_gige.hh
@@ -175,6 +175,10 @@ class NSGigE : public PciDev
ns_desc txDescCache;
ns_desc rxDescCache;
+ /* state machine cycle time */
+ Tick cycleTime;
+ inline Tick cycles(int numCycles) const { return numCycles * cycleTime; }
+
/* tx State Machine */
TxState txState;
bool txEnable;
@@ -324,6 +328,7 @@ class NSGigE : public PciDev
HierParams *hier;
Bus *header_bus;
Bus *payload_bus;
+ Tick cycle_time;
Tick intr_delay;
Tick tx_delay;
Tick rx_delay;
diff --git a/dev/platform.cc b/dev/platform.cc
index cf012352b..adced0c5f 100644
--- a/dev/platform.cc
+++ b/dev/platform.cc
@@ -32,6 +32,15 @@
using namespace std;
+Platform::Platform(const string &name, IntrControl *intctrl, PciConfigAll *pci)
+ : SimObject(name), intrctrl(intctrl), pciconfig(pci)
+{
+}
+
+Platform::~Platform()
+{
+}
+
void
Platform::postPciInt(int line)
{
diff --git a/dev/platform.hh b/dev/platform.hh
index 47ca6209f..eb56546be 100644
--- a/dev/platform.hh
+++ b/dev/platform.hh
@@ -31,8 +31,8 @@
* Generic interface for platforms
*/
-#ifndef __PLATFORM_HH_
-#define __PLATFORM_HH_
+#ifndef __DEV_PLATFORM_HH__
+#define __DEV_PLATFORM_HH__
#include "sim/sim_object.hh"
#include "targetarch/isa_traits.hh"
@@ -47,20 +47,16 @@ class Platform : public SimObject
public:
/** Pointer to the interrupt controller */
IntrControl *intrctrl;
+
/** Pointer to the PCI configuration space */
PciConfigAll *pciconfig;
/** Pointer to the UART, set by the uart */
Uart *uart;
- int interrupt_frequency;
-
public:
- Platform(const std::string &name, IntrControl *intctrl,
- PciConfigAll *pci, int intrFreq)
- : SimObject(name), intrctrl(intctrl), pciconfig(pci),
- interrupt_frequency(intrFreq) {}
- virtual ~Platform() {}
+ Platform(const std::string &name, IntrControl *intctrl, PciConfigAll *pci);
+ virtual ~Platform();
virtual void postConsoleInt() = 0;
virtual void clearConsoleInt() = 0;
virtual Tick intrFrequency() = 0;
@@ -69,4 +65,4 @@ class Platform : public SimObject
virtual Addr pciToDma(Addr pciAddr) const;
};
-#endif // __PLATFORM_HH_
+#endif // __DEV_PLATFORM_HH__
diff --git a/dev/sinic.cc b/dev/sinic.cc
index 13e16afae..9535a58ca 100644
--- a/dev/sinic.cc
+++ b/dev/sinic.cc
@@ -78,10 +78,9 @@ const char *TxStateStrings[] =
// Sinic PCI Device
//
Base::Base(Params *p)
- : PciDev(p), rxEnable(false), txEnable(false),
- intrDelay(p->intr_delay * Clock::Int::us),
- intrTick(0), cpuIntrEnable(false), cpuPendingIntr(false), intrEvent(0),
- interface(NULL)
+ : PciDev(p), rxEnable(false), txEnable(false), cycleTime(p->cycle_time),
+ intrDelay(p->intr_delay), intrTick(0), cpuIntrEnable(false),
+ cpuPendingIntr(false), intrEvent(0), interface(NULL)
{
}
@@ -888,7 +887,7 @@ Device::transmit()
reschedule:
if (!txFifo.empty() && !txEvent.scheduled()) {
DPRINTF(Ethernet, "reschedule transmit\n");
- txEvent.schedule(curTick + 1000);
+ txEvent.schedule(curTick + retryTime);
}
}
@@ -1025,9 +1024,9 @@ Device::transferDone()
DPRINTF(Ethernet, "transfer complete: data in txFifo...schedule xmit\n");
if (txEvent.scheduled())
- txEvent.reschedule(curTick + 1);
+ txEvent.reschedule(curTick + cycles(1));
else
- txEvent.schedule(curTick + 1);
+ txEvent.schedule(curTick + cycles(1));
}
bool
@@ -1361,6 +1360,7 @@ REGISTER_SIM_OBJECT("SinicInt", Interface)
BEGIN_DECLARE_SIM_OBJECT_PARAMS(Device)
+ Param<Tick> cycle_time;
Param<Tick> tx_delay;
Param<Tick> rx_delay;
Param<Tick> intr_delay;
@@ -1393,6 +1393,7 @@ END_DECLARE_SIM_OBJECT_PARAMS(Device)
BEGIN_INIT_SIM_OBJECT_PARAMS(Device)
+ INIT_PARAM(cycle_time, "State machine cycle time"),
INIT_PARAM_DFLT(tx_delay, "Transmit Delay", 1000),
INIT_PARAM_DFLT(rx_delay, "Receive Delay", 1000),
INIT_PARAM_DFLT(intr_delay, "Interrupt Delay in microseconds", 0),
@@ -1431,6 +1432,7 @@ CREATE_SIM_OBJECT(Device)
params->name = getInstanceName();
params->intr_delay = intr_delay;
params->physmem = physmem;
+ params->cycle_time = cycle_time;
params->tx_delay = tx_delay;
params->rx_delay = rx_delay;
params->mmu = mmu;
diff --git a/dev/sinic.hh b/dev/sinic.hh
index 9b8920f3b..6597357a2 100644
--- a/dev/sinic.hh
+++ b/dev/sinic.hh
@@ -48,6 +48,8 @@ class Base : public PciDev
protected:
bool rxEnable;
bool txEnable;
+ Tick cycleTime;
+ inline Tick cycles(int numCycles) const { return numCycles * cycleTime; }
protected:
Tick intrDelay;
@@ -79,6 +81,7 @@ class Base : public PciDev
public:
struct Params : public PciDev::Params
{
+ Tick cycle_time;
Tick intr_delay;
};
diff --git a/dev/tsunami.cc b/dev/tsunami.cc
index c84dde9bc..55a2c5ea6 100644
--- a/dev/tsunami.cc
+++ b/dev/tsunami.cc
@@ -45,9 +45,9 @@
using namespace std;
-Tsunami::Tsunami(const string &name, System *s,
- IntrControl *ic, PciConfigAll *pci, int intr_freq)
- : Platform(name, ic, pci, intr_freq), system(s)
+Tsunami::Tsunami(const string &name, System *s, IntrControl *ic,
+ PciConfigAll *pci)
+ : Platform(name, ic, pci), system(s)
{
// set the back pointer from the system to myself
system->platform = this;
@@ -109,7 +109,6 @@ BEGIN_DECLARE_SIM_OBJECT_PARAMS(Tsunami)
SimObjectParam<System *> system;
SimObjectParam<IntrControl *> intrctrl;
SimObjectParam<PciConfigAll *> pciconfig;
- Param<int> interrupt_frequency;
END_DECLARE_SIM_OBJECT_PARAMS(Tsunami)
@@ -117,15 +116,13 @@ BEGIN_INIT_SIM_OBJECT_PARAMS(Tsunami)
INIT_PARAM(system, "system"),
INIT_PARAM(intrctrl, "interrupt controller"),
- INIT_PARAM(pciconfig, "PCI configuration"),
- INIT_PARAM_DFLT(interrupt_frequency, "frequency of interrupts", 1024)
+ INIT_PARAM(pciconfig, "PCI configuration")
END_INIT_SIM_OBJECT_PARAMS(Tsunami)
CREATE_SIM_OBJECT(Tsunami)
{
- return new Tsunami(getInstanceName(), system, intrctrl, pciconfig,
- interrupt_frequency);
+ return new Tsunami(getInstanceName(), system, intrctrl, pciconfig);
}
REGISTER_SIM_OBJECT("Tsunami", Tsunami)
diff --git a/dev/tsunami.hh b/dev/tsunami.hh
index 7722c8417..70dc506fd 100644
--- a/dev/tsunami.hh
+++ b/dev/tsunami.hh
@@ -89,7 +89,7 @@ class Tsunami : public Platform
* @param intrFreq frequency that interrupts happen
*/
Tsunami(const std::string &name, System *s, IntrControl *intctrl,
- PciConfigAll *pci, int intrFreq);
+ PciConfigAll *pci);
/**
* Return the interrupting frequency to AlphaAccess
diff --git a/dev/tsunami_io.cc b/dev/tsunami_io.cc
index 1e4f44346..895888a09 100644
--- a/dev/tsunami_io.cc
+++ b/dev/tsunami_io.cc
@@ -53,18 +53,18 @@ using namespace std;
#define UNIX_YEAR_OFFSET 52
// Timer Event for Periodic interrupt of RTC
-TsunamiIO::RTCEvent::RTCEvent(Tsunami* t)
- : Event(&mainEventQueue), tsunami(t)
+TsunamiIO::RTCEvent::RTCEvent(Tsunami* t, Tick i)
+ : Event(&mainEventQueue), tsunami(t), interval(i)
{
DPRINTF(MC146818, "RTC Event Initilizing\n");
- schedule(curTick + ticksPerSecond/RTC_RATE);
+ schedule(curTick + interval);
}
void
TsunamiIO::RTCEvent::process()
{
DPRINTF(MC146818, "RTC Timer Interrupt\n");
- schedule(curTick + ticksPerSecond/RTC_RATE);
+ schedule(curTick + interval);
//Actually interrupt the processor here
tsunami->cchip->postRTC();
}
@@ -72,7 +72,7 @@ TsunamiIO::RTCEvent::process()
const char *
TsunamiIO::RTCEvent::description()
{
- return "tsunami RTC 1024Hz interrupt";
+ return "tsunami RTC interrupt";
}
void
@@ -119,7 +119,7 @@ TsunamiIO::ClockEvent::process()
void
TsunamiIO::ClockEvent::Program(int count)
{
- DPRINTF(Tsunami, "Timer set to curTick + %d\n", count);
+ DPRINTF(Tsunami, "Timer set to curTick + %d\n", count * interval);
schedule(curTick + count * interval);
status = 0;
}
@@ -166,8 +166,8 @@ TsunamiIO::ClockEvent::unserialize(Checkpoint *cp, const std::string &section)
TsunamiIO::TsunamiIO(const string &name, Tsunami *t, time_t init_time,
Addr a, MemoryController *mmu, HierParams *hier, Bus *bus,
- Tick pio_latency)
- : PioDevice(name, t), addr(a), tsunami(t), rtc(t)
+ Tick pio_latency, Tick ci)
+ : PioDevice(name, t), addr(a), clockInterval(ci), tsunami(t), rtc(t, ci)
{
mmu->add_child(this, RangeSize(addr, size));
@@ -188,6 +188,12 @@ TsunamiIO::TsunamiIO(const string &name, Tsunami *t, time_t init_time,
picInterrupting = false;
}
+Tick
+TsunamiIO::frequency() const
+{
+ return Clock::Frequency / clockInterval;
+}
+
void
TsunamiIO::set_time(time_t t)
{
@@ -485,26 +491,27 @@ BEGIN_DECLARE_SIM_OBJECT_PARAMS(TsunamiIO)
SimObjectParam<Bus*> io_bus;
Param<Tick> pio_latency;
SimObjectParam<HierParams *> hier;
+ Param<Tick> frequency;
END_DECLARE_SIM_OBJECT_PARAMS(TsunamiIO)
BEGIN_INIT_SIM_OBJECT_PARAMS(TsunamiIO)
INIT_PARAM(tsunami, "Tsunami"),
- INIT_PARAM_DFLT(time, "System time to use "
- "(0 for actual time, default is 1/1/06", ULL(1136073600)),
+ INIT_PARAM(time, "System time to use (0 for actual time"),
INIT_PARAM(mmu, "Memory Controller"),
INIT_PARAM(addr, "Device Address"),
INIT_PARAM_DFLT(io_bus, "The IO Bus to attach to", NULL),
INIT_PARAM_DFLT(pio_latency, "Programmed IO latency in bus cycles", 1),
- INIT_PARAM_DFLT(hier, "Hierarchy global variables", &defaultHierParams)
+ INIT_PARAM_DFLT(hier, "Hierarchy global variables", &defaultHierParams),
+ INIT_PARAM(frequency, "clock interrupt frequency")
END_INIT_SIM_OBJECT_PARAMS(TsunamiIO)
CREATE_SIM_OBJECT(TsunamiIO)
{
return new TsunamiIO(getInstanceName(), tsunami, time, addr, mmu, hier,
- io_bus, pio_latency);
+ io_bus, pio_latency, frequency);
}
REGISTER_SIM_OBJECT("TsunamiIO", TsunamiIO)
diff --git a/dev/tsunami_io.hh b/dev/tsunami_io.hh
index a9f044ec9..9d74ccdef 100644
--- a/dev/tsunami_io.hh
+++ b/dev/tsunami_io.hh
@@ -38,9 +38,6 @@
#include "dev/tsunami.hh"
#include "sim/eventq.hh"
-/** How often the RTC interrupts */
-static const int RTC_RATE = 1024;
-
/*
* Tsunami I/O device is a catch all for all the south bridge stuff we care
* to implement.
@@ -136,10 +133,14 @@ class TsunamiIO : public PioDevice
protected:
/** A pointer back to tsunami to create interrupt the processor. */
Tsunami* tsunami;
+ Tick interval;
+
public:
- /** RTC Event initializes the RTC event by scheduling an event
- * RTC_RATE times pre second. */
- RTCEvent(Tsunami* t);
+ /**
+ * RTC Event initializes the RTC event by scheduling an event
+ * RTC_RATE times pre second.
+ */
+ RTCEvent(Tsunami* t, Tick i);
/**
* Interrupth the processor and reschedule the event.
@@ -191,6 +192,8 @@ class TsunamiIO : public PioDevice
/** Is the pic interrupting right now or not. */
bool picInterrupting;
+ Tick clockInterval;
+
/** A pointer to the Tsunami device which be belong to */
Tsunami *tsunami;
@@ -225,7 +228,7 @@ class TsunamiIO : public PioDevice
* Return the freqency of the RTC
* @return interrupt rate of the RTC
*/
- Tick frequency() const { return RTC_RATE; }
+ Tick frequency() const;
/**
* Initialize all the data for devices supported by Tsunami I/O.
@@ -237,7 +240,7 @@ class TsunamiIO : public PioDevice
*/
TsunamiIO(const std::string &name, Tsunami *t, time_t init_time,
Addr a, MemoryController *mmu, HierParams *hier, Bus *bus,
- Tick pio_latency);
+ Tick pio_latency, Tick ci);
/**
* Create the tm struct from seconds since 1970
generated by cgit v1.2.3 (git 2.25.1) at 2024-10-30 17:28:36 +0000