33 files changed, 373 insertions, 247 deletions
diff --git a/dev/alpha_console.cc b/dev/alpha_console.cc
index 7deabe2fc..8309ea16d 100644
--- a/dev/alpha_console.cc
+++ b/dev/alpha_console.cc
@@ -56,10 +56,10 @@
 using namespace std;
 
 AlphaConsole::AlphaConsole(const string &name, SimConsole *cons, SimpleDisk *d,
-                           System *system, BaseCPU *cpu, Platform *platform,
+                           System *system, BaseCPU *cpu, Platform *p,
                            int num_cpus, MemoryController *mmu, Addr a,
                            HierParams *hier, Bus *bus)
-    : PioDevice(name), disk(d), console(cons), addr(a)
+    : PioDevice(name, p), disk(d), console(cons), addr(a)
 {
     mmu->add_child(this, RangeSize(addr, size));
 
@@ -79,7 +79,7 @@ AlphaConsole::AlphaConsole(const string &name, SimConsole *cons, SimpleDisk *d,
     alphaAccess->numCPUs = num_cpus;
     alphaAccess->mem_size = system->physmem->size();
     alphaAccess->cpuClock = cpu->getFreq() / 1000000;
-        alphaAccess->intrClockFrequency = platform->intrFrequency();
+    alphaAccess->intrClockFrequency = platform->intrFrequency();
     alphaAccess->diskUnit = 1;
 
     alphaAccess->diskCount = 0;
@@ -329,6 +329,7 @@ BEGIN_DECLARE_SIM_OBJECT_PARAMS(AlphaConsole)
     SimObjectParam<BaseCPU *> cpu;
     SimObjectParam<Platform *> platform;
     SimObjectParam<Bus*> io_bus;
+    Param<Tick> pio_latency;
     SimObjectParam<HierParams *> hier;
 
 END_DECLARE_SIM_OBJECT_PARAMS(AlphaConsole)
@@ -344,6 +345,7 @@ BEGIN_INIT_SIM_OBJECT_PARAMS(AlphaConsole)
     INIT_PARAM(cpu, "Processor"),
     INIT_PARAM(platform, "platform"),
     INIT_PARAM_DFLT(io_bus, "The IO Bus to attach to", NULL),
+    INIT_PARAM_DFLT(pio_latency, "Programmed IO latency", 1000),
     INIT_PARAM_DFLT(hier, "Hierarchy global variables", &defaultHierParams)
 
 END_INIT_SIM_OBJECT_PARAMS(AlphaConsole)
diff --git a/dev/alpha_console.hh b/dev/alpha_console.hh
index 49c3a9f78..96b0a22c2 100644
--- a/dev/alpha_console.hh
+++ b/dev/alpha_console.hh
@@ -42,7 +42,6 @@
 class BaseCPU;
 class SimConsole;
 class System;
-class Platform;
 class SimpleDisk;
 
 /*
@@ -75,7 +74,7 @@ class AlphaConsole : public PioDevice
   protected:
     union {
         AlphaAccess *alphaAccess;
-    uint8_t *consoleData;
+        uint8_t *consoleData;
     };
 
     /** the disk must be accessed from the console */
diff --git a/dev/baddev.cc b/dev/baddev.cc
index 73b082d47..bb1d289ab 100644
--- a/dev/baddev.cc
+++ b/dev/baddev.cc
@@ -37,6 +37,7 @@
 #include "base/trace.hh"
 #include "cpu/exec_context.hh"
 #include "dev/baddev.hh"
+#include "dev/platform.hh"
 #include "mem/bus/bus.hh"
 #include "mem/bus/pio_interface.hh"
 #include "mem/bus/pio_interface_impl.hh"
@@ -48,7 +49,7 @@ using namespace std;
 
 BadDevice::BadDevice(const string &name, Addr a, MemoryController *mmu,
                      HierParams *hier, Bus *bus, const string &devicename)
-    : PioDevice(name), addr(a), devname(devicename)
+    : PioDevice(name, NULL), addr(a), devname(devicename)
 {
     mmu->add_child(this, RangeSize(addr, size));
 
@@ -83,20 +84,24 @@ BadDevice::cacheAccess(MemReqPtr &req)
 
 BEGIN_DECLARE_SIM_OBJECT_PARAMS(BadDevice)
 
+    SimObjectParam<Platform *> platform;
     SimObjectParam<MemoryController *> mmu;
     Param<Addr> addr;
     SimObjectParam<HierParams *> hier;
     SimObjectParam<Bus*> io_bus;
+    Param<Tick> pio_latency;
     Param<string> devicename;
 
 END_DECLARE_SIM_OBJECT_PARAMS(BadDevice)
 
 BEGIN_INIT_SIM_OBJECT_PARAMS(BadDevice)
 
+    INIT_PARAM(platform, "Platform"),
     INIT_PARAM(mmu, "Memory Controller"),
     INIT_PARAM(addr, "Device Address"),
     INIT_PARAM_DFLT(hier, "Hierarchy global variables", &defaultHierParams),
     INIT_PARAM_DFLT(io_bus, "The IO Bus to attach to", NULL),
+    INIT_PARAM_DFLT(pio_latency, "Programmed IO latency", 1000),
     INIT_PARAM(devicename, "Name of device to error on")
 
 END_INIT_SIM_OBJECT_PARAMS(BadDevice)
diff --git a/dev/baddev.hh b/dev/baddev.hh
index 8680f6b0a..a9e904c62 100644
--- a/dev/baddev.hh
+++ b/dev/baddev.hh
@@ -31,8 +31,8 @@
  * kernel that touches the frame buffer which isn't allowed.
  */
 
-#ifndef __BADDEV_HH__
-#define __BADDEV_HH__
+#ifndef __DEV_BADDEV_HH__
+#define __DEV_BADDEV_HH__
 
 #include "base/range.hh"
 #include "dev/io_device.hh"
@@ -90,4 +90,4 @@ class BadDevice : public PioDevice
     Tick cacheAccess(MemReqPtr &req);
 };
 
-#endif // __BADDEV_HH__
+#endif // __DEV_BADDEV_HH__
diff --git a/dev/etherdump.cc b/dev/etherdump.cc
index 485d5599c..3de417bdc 100644
--- a/dev/etherdump.cc
+++ b/dev/etherdump.cc
@@ -36,14 +36,15 @@
 #include <string>
 
 #include "base/misc.hh"
+#include "base/output.hh"
 #include "dev/etherdump.hh"
 #include "sim/builder.hh"
 #include "sim/universe.hh"
 
 using std::string;
 
-EtherDump::EtherDump(const string &name, std::ostream *_stream, int max)
-    : SimObject(name), stream(_stream), maxlen(max)
+EtherDump::EtherDump(const string &name, const string &file, int max)
+    : SimObject(name), stream(file.c_str()), maxlen(max)
 {
 }
 
@@ -86,7 +87,7 @@ EtherDump::init()
     hdr.sigfigs = 0;
     hdr.linktype = DLT_EN10MB;
 
-    stream->write(reinterpret_cast<char *>(&hdr), sizeof(hdr));
+    stream.write(reinterpret_cast<char *>(&hdr), sizeof(hdr));
 
     /*
      * output an empty packet with the current time so that we know
@@ -98,9 +99,9 @@ EtherDump::init()
     pkthdr.microseconds = 0;
     pkthdr.caplen = 0;
     pkthdr.len = 0;
-    stream->write(reinterpret_cast<char *>(&pkthdr), sizeof(pkthdr));
+    stream.write(reinterpret_cast<char *>(&pkthdr), sizeof(pkthdr));
 
-    stream->flush();
+    stream.flush();
 }
 
 void
@@ -111,9 +112,9 @@ EtherDump::dumpPacket(PacketPtr &packet)
     pkthdr.microseconds = (curTick / us_freq) % ULL(1000000);
     pkthdr.caplen = std::min(packet->length, maxlen);
     pkthdr.len = packet->length;
-    stream->write(reinterpret_cast<char *>(&pkthdr), sizeof(pkthdr));
-    stream->write(reinterpret_cast<char *>(packet->data), pkthdr.caplen);
-    stream->flush();
+    stream.write(reinterpret_cast<char *>(&pkthdr), sizeof(pkthdr));
+    stream.write(reinterpret_cast<char *>(packet->data), pkthdr.caplen);
+    stream.flush();
 }
 
 BEGIN_DECLARE_SIM_OBJECT_PARAMS(EtherDump)
@@ -132,7 +133,7 @@ END_INIT_SIM_OBJECT_PARAMS(EtherDump)
 
 CREATE_SIM_OBJECT(EtherDump)
 {
-    return new EtherDump(getInstanceName(), makeOutputStream(file), maxlen);
+    return new EtherDump(getInstanceName(), simout.resolve(file), maxlen);
 }
 
 REGISTER_SIM_OBJECT("EtherDump", EtherDump)
diff --git a/dev/etherdump.hh b/dev/etherdump.hh
index b127d05e2..ba15796c8 100644
--- a/dev/etherdump.hh
+++ b/dev/etherdump.hh
@@ -43,7 +43,7 @@
 class EtherDump : public SimObject
 {
   private:
-    std::ostream *stream;
+    std::ofstream stream;
     const int maxlen;
     void dumpPacket(PacketPtr &packet);
     void init();
@@ -53,7 +53,7 @@ class EtherDump : public SimObject
     Tick us_freq;
 
   public:
-    EtherDump(const std::string &name, std::ostream *_stream, int max);
+    EtherDump(const std::string &name, const std::string &file, int max);
 
     inline void dump(PacketPtr &pkt) { dumpPacket(pkt); }
 };
diff --git a/dev/etherlink.cc b/dev/etherlink.cc
index d637e152a..81cdbc20f 100644
--- a/dev/etherlink.cc
+++ b/dev/etherlink.cc
@@ -47,32 +47,32 @@
 
 using namespace std;
 
-EtherLink::EtherLink(const string &name, EtherInt *i1, EtherInt *i2,
+EtherLink::EtherLink(const string &name, EtherInt *peer0, EtherInt *peer1,
                      Tick speed, Tick dly, EtherDump *dump)
     : SimObject(name)
 {
     double rate = ((double)ticksPerSecond * 8.0) / (double)speed;
     Tick delay = US2Ticks(dly);
 
-    link1 = new Link(name + ".link1", rate, delay, dump);
-    link2 = new Link(name + ".link2", rate, delay, dump);
+    link[0] = new Link(name + ".link0", this, 0, rate, delay, dump);
+    link[1] = new Link(name + ".link1", this, 1, rate, delay, dump);
 
-    int1 = new Interface(name + ".int1", link1, link2);
-    int2 = new Interface(name + ".int2", link2, link1);
+    interface[0] = new Interface(name + ".int0", link[0], link[1]);
+    interface[1] = new Interface(name + ".int1", link[1], link[0]);
 
-    int1->setPeer(i1);
-    i1->setPeer(int1);
-    int2->setPeer(i2);
-    i2->setPeer(int2);
+    interface[0]->setPeer(peer0);
+    peer0->setPeer(interface[0]);
+    interface[1]->setPeer(peer1);
+    peer1->setPeer(interface[1]);
 }
 
 EtherLink::~EtherLink()
 {
-    delete link1;
-    delete link2;
+    delete link[0];
+    delete link[1];
 
-    delete int1;
-    delete int2;
+    delete interface[0];
+    delete interface[1];
 }
 
 EtherLink::Interface::Interface(const string &name, Link *tx, Link *rx)
@@ -82,26 +82,25 @@ EtherLink::Interface::Interface(const string &name, Link *tx, Link *rx)
     rx->setRxInt(this);
 }
 
-EtherLink::Link::Link(const string &name, double rate, Tick delay,
-                      EtherDump *d)
-    : objName(name), txint(NULL), rxint(NULL), ticksPerByte(rate),
-      linkDelay(delay), dump(d), doneEvent(this)
-{}
+EtherLink::Link::Link(const string &name, EtherLink *p, int num,
+                      double rate, Tick delay, EtherDump *d)
+    : objName(name), parent(p), number(num), txint(NULL), rxint(NULL),
+      ticksPerByte(rate), linkDelay(delay), dump(d),
+      doneEvent(this)
+{ }
 
 void
 EtherLink::serialize(ostream &os)
 {
-    nameOut(os, name() + ".link1");
-    link1->serialize(os);
-    nameOut(os, name() + ".link2");
-    link2->serialize(os);
+    link[0]->serialize("link0", os);
+    link[1]->serialize("link1", os);
 }
 
 void
 EtherLink::unserialize(Checkpoint *cp, const string &section)
 {
-    link1->unserialize(cp, section + ".link1");
-    link2->unserialize(cp, section + ".link2");
+    link[0]->unserialize("link0", cp, section);
+    link[1]->unserialize("link1", cp, section);
 }
 
 void
@@ -118,10 +117,9 @@ class LinkDelayEvent : public Event
     EtherLink::Link *link;
     PacketPtr packet;
 
-    // non-scheduling version for createForUnserialize()
-    LinkDelayEvent(EtherLink::Link *link);
-
   public:
+    // non-scheduling version for createForUnserialize()
+    LinkDelayEvent();
     LinkDelayEvent(EtherLink::Link *link, PacketPtr pkt, Tick when);
 
     void process();
@@ -132,7 +130,6 @@ class LinkDelayEvent : public Event
                                               const string &section);
 };
 
-
 void
 EtherLink::Link::txDone()
 {
@@ -173,43 +170,44 @@ EtherLink::Link::transmit(PacketPtr pkt)
 }
 
 void
-EtherLink::Link::serialize(ostream &os)
+EtherLink::Link::serialize(const string &base, ostream &os)
 {
     bool packet_exists = packet;
-    SERIALIZE_SCALAR(packet_exists);
+    paramOut(os, base + ".packet_exists", packet_exists);
+    if (packet_exists)
+        packet->serialize(base + ".packet", os);
 
     bool event_scheduled = doneEvent.scheduled();
-    SERIALIZE_SCALAR(event_scheduled);
+    paramOut(os, base + ".event_scheduled", event_scheduled);
     if (event_scheduled) {
         Tick event_time = doneEvent.when();
-        SERIALIZE_SCALAR(event_time);
+        paramOut(os, base + ".event_time", event_time);
     }
 
-    if (packet_exists)
-        packet->serialize("packet", os);
 }
 
 void
-EtherLink::Link::unserialize(Checkpoint *cp, const string &section)
+EtherLink::Link::unserialize(const string &base, Checkpoint *cp,
+                             const string &section)
 {
     bool packet_exists;
-    UNSERIALIZE_SCALAR(packet_exists);
+    paramIn(cp, section, base + ".packet_exists", packet_exists);
     if (packet_exists) {
         packet = new PacketData(16384);
-        packet->unserialize("packet", cp, section);
+        packet->unserialize(base + ".packet", cp, section);
     }
 
     bool event_scheduled;
-    UNSERIALIZE_SCALAR(event_scheduled);
+    paramIn(cp, section, base + ".event_scheduled", event_scheduled);
     if (event_scheduled) {
         Tick event_time;
-        UNSERIALIZE_SCALAR(event_time);
+        paramIn(cp, section, base + ".event_time", event_time);
         doneEvent.schedule(event_time);
     }
 }
 
-LinkDelayEvent::LinkDelayEvent(EtherLink::Link *l)
-    : Event(&mainEventQueue), link(l)
+LinkDelayEvent::LinkDelayEvent()
+    : Event(&mainEventQueue), link(NULL)
 {
     setFlags(AutoSerialize);
     setFlags(AutoDelete);
@@ -234,7 +232,11 @@ LinkDelayEvent::serialize(ostream &os)
 {
     paramOut(os, "type", string("LinkDelayEvent"));
     Event::serialize(os);
-    SERIALIZE_OBJPTR(link);
+
+    EtherLink *parent = link->parent;
+    bool number = link->number;
+    SERIALIZE_OBJPTR(parent);
+    SERIALIZE_SCALAR(number);
 
     packet->serialize("packet", os);
 }
@@ -244,6 +246,14 @@ void
 LinkDelayEvent::unserialize(Checkpoint *cp, const string &section)
 {
     Event::unserialize(cp, section);
+
+    EtherLink *parent;
+    bool number;
+    UNSERIALIZE_OBJPTR(parent);
+    UNSERIALIZE_SCALAR(number);
+
+    link = parent->link[number];
+
     packet = new PacketData(16384);
     packet->unserialize("packet", cp, section);
 }
@@ -252,37 +262,34 @@ LinkDelayEvent::unserialize(Checkpoint *cp, const string &section)
 Serializable *
 LinkDelayEvent::createForUnserialize(Checkpoint *cp, const string &section)
 {
-    EtherLink::Link *link;
-    UNSERIALIZE_OBJPTR(link);
-    return new LinkDelayEvent(link);
+    return new LinkDelayEvent();
 }
 
 REGISTER_SERIALIZEABLE("LinkDelayEvent", LinkDelayEvent)
 
 BEGIN_DECLARE_SIM_OBJECT_PARAMS(EtherLink)
 
-    SimObjectParam<EtherInt *> interface1;
-    SimObjectParam<EtherInt *> interface2;
-    Param<Tick> link_speed;
-    Param<Tick> link_delay;
-    SimObjectParam<EtherDump *> packet_dump;
+    SimObjectParam<EtherInt *> int1;
+    SimObjectParam<EtherInt *> int2;
+    Param<Tick> speed;
+    Param<Tick> delay;
+    SimObjectParam<EtherDump *> dump;
 
 END_DECLARE_SIM_OBJECT_PARAMS(EtherLink)
 
 BEGIN_INIT_SIM_OBJECT_PARAMS(EtherLink)
 
-    INIT_PARAM(interface1, "interface 1"),
-    INIT_PARAM(interface2, "interface 2"),
-    INIT_PARAM_DFLT(link_speed, "link speed in bits per second", 100000000),
-    INIT_PARAM_DFLT(link_delay, "transmit delay of packets in us", 0),
-    INIT_PARAM_DFLT(packet_dump, "object to dump network packets to", NULL)
+    INIT_PARAM(int1, "interface 1"),
+    INIT_PARAM(int2, "interface 2"),
+    INIT_PARAM_DFLT(speed, "link speed in bits per second", 100000000),
+    INIT_PARAM_DFLT(delay, "transmit delay of packets in us", 0),
+    INIT_PARAM_DFLT(dump, "object to dump network packets to", NULL)
 
 END_INIT_SIM_OBJECT_PARAMS(EtherLink)
 
 CREATE_SIM_OBJECT(EtherLink)
 {
-    return new EtherLink(getInstanceName(), interface1, interface2, link_speed,
-                         link_delay, packet_dump);
+    return new EtherLink(getInstanceName(), int1, int2, speed, delay, dump);
 }
 
 REGISTER_SIM_OBJECT("EtherLink", EtherLink)
diff --git a/dev/etherlink.hh b/dev/etherlink.hh
index e998a006f..28ab61301 100644
--- a/dev/etherlink.hh
+++ b/dev/etherlink.hh
@@ -30,17 +30,17 @@
  * Device module for modelling a fixed bandwidth full duplex ethernet link
  */
 
-#ifndef __ETHERLINK_HH__
-#define __ETHERLINK_HH__
+#ifndef __DEV_ETHERLINK_HH__
+#define __DEV_ETHERLINK_HH__
 
-#include "sim/host.hh"
-#include "sim/eventq.hh"
 #include "dev/etherint.hh"
 #include "dev/etherpkt.hh"
+#include "sim/eventq.hh"
+#include "sim/host.hh"
 #include "sim/sim_object.hh"
 
 class EtherDump;
-
+class Checkpoint;
 /*
  * Model for a fixed bandwidth full duplex ethernet link
  */
@@ -53,10 +53,14 @@ class EtherLink : public SimObject
      /*
       * Model for a single uni-directional link
       */
-    class Link : public Serializable {
+    class Link
+    {
       protected:
         std::string objName;
 
+        EtherLink *parent;
+        int number;
+
         Interface *txint;
         Interface *rxint;
 
@@ -71,18 +75,18 @@ class EtherLink : public SimObject
         PacketPtr packet;
         void txDone();
         typedef EventWrapper<Link, &Link::txDone> DoneEvent;
-        friend class DoneEvent;
+        friend void DoneEvent::process();
         DoneEvent doneEvent;
 
         friend class LinkDelayEvent;
         void txComplete(PacketPtr packet);
 
       public:
-        Link(const std::string &name, double rate, Tick delay,
-             EtherDump *dump);
+        Link(const std::string &name, EtherLink *p, int num,
+             double rate, Tick delay, EtherDump *dump);
         ~Link() {}
 
-        virtual const std::string name() const { return objName; }
+        const std::string name() const { return objName; }
 
         bool busy() const { return (bool)packet; }
         bool transmit(PacketPtr packet);
@@ -90,8 +94,9 @@ class EtherLink : public SimObject
         void setTxInt(Interface *i) { assert(!txint); txint = i; }
         void setRxInt(Interface *i) { assert(!rxint); rxint = i; }
 
-        virtual void serialize(std::ostream &os);
-        virtual void unserialize(Checkpoint *cp, const std::string &section);
+        void serialize(const std::string &base, std::ostream &os);
+        void unserialize(const std::string &base, Checkpoint *cp,
+                                 const std::string &section);
     };
 
     /*
@@ -108,14 +113,11 @@ class EtherLink : public SimObject
         void sendDone() { peer->sendDone(); }
     };
 
-    Link *link1;
-    Link *link2;
-
-    EtherInt *int1;
-    EtherInt *int2;
+    Link *link[2];
+    EtherInt *interface[2];
 
   public:
-    EtherLink(const std::string &name, EtherInt *i1, EtherInt *i2,
+    EtherLink(const std::string &name, EtherInt *peer0, EtherInt *peer1,
               Tick speed, Tick delay, EtherDump *dump);
     virtual ~EtherLink();
 
diff --git a/dev/ethertap.cc b/dev/ethertap.cc
index 1603a9bd3..807765d91 100644
--- a/dev/ethertap.cc
+++ b/dev/ethertap.cc
@@ -311,7 +311,7 @@ EtherTap::unserialize(Checkpoint *cp, const std::string &section)
 BEGIN_DECLARE_SIM_OBJECT_PARAMS(EtherTap)
 
     SimObjectParam<EtherInt *> peer;
-    SimObjectParam<EtherDump *> packet_dump;
+    SimObjectParam<EtherDump *> dump;
     Param<unsigned> port;
     Param<unsigned> bufsz;
 
@@ -320,7 +320,7 @@ END_DECLARE_SIM_OBJECT_PARAMS(EtherTap)
 BEGIN_INIT_SIM_OBJECT_PARAMS(EtherTap)
 
     INIT_PARAM_DFLT(peer, "peer interface", NULL),
-    INIT_PARAM_DFLT(packet_dump, "object to dump network packets to", NULL),
+    INIT_PARAM_DFLT(dump, "object to dump network packets to", NULL),
     INIT_PARAM_DFLT(port, "tap port", 3500),
     INIT_PARAM_DFLT(bufsz, "tap buffer size", 10000)
 
@@ -329,7 +329,7 @@ END_INIT_SIM_OBJECT_PARAMS(EtherTap)
 
 CREATE_SIM_OBJECT(EtherTap)
 {
-    EtherTap *tap = new EtherTap(getInstanceName(), packet_dump, port, bufsz);
+    EtherTap *tap = new EtherTap(getInstanceName(), dump, port, bufsz);
 
     if (peer) {
         tap->setPeer(peer);
diff --git a/dev/ide_ctrl.cc b/dev/ide_ctrl.cc
index 109908ead..037de1dea 100644
--- a/dev/ide_ctrl.cc
+++ b/dev/ide_ctrl.cc
@@ -664,6 +664,7 @@ IdeController::unserialize(Checkpoint *cp, const std::string &section)
 
 BEGIN_DECLARE_SIM_OBJECT_PARAMS(IdeController)
 
+    Param<Addr> addr;
     SimObjectVectorParam<IdeDisk *> disks;
     SimObjectParam<MemoryController *> mmu;
     SimObjectParam<PciConfigAll *> configspace;
@@ -680,6 +681,7 @@ END_DECLARE_SIM_OBJECT_PARAMS(IdeController)
 
 BEGIN_INIT_SIM_OBJECT_PARAMS(IdeController)
 
+    INIT_PARAM(addr, "Device Address"),
     INIT_PARAM(disks, "IDE disks attached to this controller"),
     INIT_PARAM(mmu, "Memory controller"),
     INIT_PARAM(configspace, "PCI Configspace"),
diff --git a/dev/ide_disk.cc b/dev/ide_disk.cc
index 073c10436..bfaf3d3aa 100644
--- a/dev/ide_disk.cc
+++ b/dev/ide_disk.cc
@@ -1171,12 +1171,14 @@ IdeDisk::unserialize(Checkpoint *cp, const string &section)
 
 #ifndef DOXYGEN_SHOULD_SKIP_THIS
 
+enum DriveID { master, slave };
+static const char *DriveID_strings[] = { "master", "slave" };
 BEGIN_DECLARE_SIM_OBJECT_PARAMS(IdeDisk)
 
     SimObjectParam<DiskImage *> image;
     SimObjectParam<PhysicalMemory *> physmem;
-    Param<int> driveID;
-    Param<int> disk_delay;
+    SimpleEnumParam<DriveID> driveID;
+    Param<int> delay;
 
 END_DECLARE_SIM_OBJECT_PARAMS(IdeDisk)
 
@@ -1184,16 +1186,15 @@ BEGIN_INIT_SIM_OBJECT_PARAMS(IdeDisk)
 
     INIT_PARAM(image, "Disk image"),
     INIT_PARAM(physmem, "Physical memory"),
-    INIT_PARAM(driveID, "Drive ID (0=master 1=slave)"),
-    INIT_PARAM_DFLT(disk_delay, "Fixed disk delay in microseconds", 1)
+    INIT_ENUM_PARAM(driveID, "Drive ID (0=master 1=slave)", DriveID_strings),
+    INIT_PARAM_DFLT(delay, "Fixed disk delay in microseconds", 1)
 
 END_INIT_SIM_OBJECT_PARAMS(IdeDisk)
 
 
 CREATE_SIM_OBJECT(IdeDisk)
 {
-    return new IdeDisk(getInstanceName(), image, physmem, driveID,
-                       disk_delay);
+    return new IdeDisk(getInstanceName(), image, physmem, driveID, delay);
 }
 
 REGISTER_SIM_OBJECT("IdeDisk", IdeDisk)
diff --git a/dev/io_device.cc b/dev/io_device.cc
index 7703ad5e3..ffded5858 100644
--- a/dev/io_device.cc
+++ b/dev/io_device.cc
@@ -31,8 +31,8 @@
 #include "mem/bus/dma_interface.hh"
 #include "sim/builder.hh"
 
-PioDevice::PioDevice(const std::string &name)
-    : FunctionalMemory(name), pioInterface(NULL), pioLatency(0)
+PioDevice::PioDevice(const std::string &name, Platform *p)
+    : FunctionalMemory(name), platform(p), pioInterface(NULL), pioLatency(0)
 {}
 
 PioDevice::~PioDevice()
@@ -43,8 +43,8 @@ PioDevice::~PioDevice()
 
 DEFINE_SIM_OBJECT_CLASS_NAME("PioDevice", PioDevice)
 
-DmaDevice::DmaDevice(const std::string &name)
-    : PioDevice(name), dmaInterface(NULL)
+DmaDevice::DmaDevice(const std::string &name, Platform *p)
+    : PioDevice(name, p), dmaInterface(NULL)
 {}
 
 DmaDevice::~DmaDevice()
diff --git a/dev/io_device.hh b/dev/io_device.hh
index 8c9dc4a35..649706956 100644
--- a/dev/io_device.hh
+++ b/dev/io_device.hh
@@ -26,24 +26,26 @@
  * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
  */
 
-#ifndef __IO_DEVICE_HH__
-#define __IO_DEVICE_HH__
+#ifndef __DEV_IO_DEVICE_HH__
+#define __DEV_IO_DEVICE_HH__
 
 #include "mem/functional_mem/functional_memory.hh"
 
 class BaseInterface;
 class Bus;
 class HierParams;
+class Platform;
 template <class BusType> class DMAInterface;
 
 class PioDevice : public FunctionalMemory
 {
   protected:
+    Platform *platform;
     BaseInterface *pioInterface;
     Tick pioLatency;
 
   public:
-    PioDevice(const std::string &name);
+    PioDevice(const std::string &name, Platform *p);
     virtual ~PioDevice();
 };
 
@@ -53,8 +55,8 @@ class DmaDevice : public PioDevice
     DMAInterface<Bus> *dmaInterface;
 
   public:
-    DmaDevice(const std::string &name);
+    DmaDevice(const std::string &name, Platform *p);
     virtual ~DmaDevice();
 };
 
-#endif // __IO_DEVICE_HH__
+#endif // __DEV_IO_DEVICE_HH__
diff --git a/dev/ns_gige.cc b/dev/ns_gige.cc
index eee8fbbce..db1474d1c 100644
--- a/dev/ns_gige.cc
+++ b/dev/ns_gige.cc
@@ -36,7 +36,6 @@
 
 #include "base/inet.hh"
 #include "cpu/exec_context.hh"
-#include "cpu/intr_control.hh"
 #include "dev/dma.hh"
 #include "dev/etherlink.hh"
 #include "dev/ns_gige.hh"
@@ -245,7 +244,6 @@ NSGigE::regStats()
         .precision(0)
         ;
 
-
     txBandwidth
         .name(name() + ".txBandwidth")
         .desc("Transmit Bandwidth (bits/s)")
@@ -260,6 +258,34 @@ NSGigE::regStats()
         .prereq(rxBytes)
         ;
 
+    totBandwidth
+        .name(name() + ".totBandwidth")
+        .desc("Total Bandwidth (bits/s)")
+        .precision(0)
+        .prereq(totBytes)
+        ;
+
+    totPackets
+        .name(name() + ".totPackets")
+        .desc("Total Packets")
+        .precision(0)
+        .prereq(totBytes)
+        ;
+
+    totBytes
+        .name(name() + ".totBytes")
+        .desc("Total Bytes")
+        .precision(0)
+        .prereq(totBytes)
+        ;
+
+    totPacketRate
+        .name(name() + ".totPPS")
+        .desc("Total Tranmission Rate (packets/s)")
+        .precision(0)
+        .prereq(totBytes)
+        ;
+
     txPacketRate
         .name(name() + ".txPPS")
         .desc("Packet Tranmission Rate (packets/s)")
@@ -450,6 +476,10 @@ NSGigE::regStats()
 
     txBandwidth = txBytes * Stats::constant(8) / simSeconds;
     rxBandwidth = rxBytes * Stats::constant(8) / simSeconds;
+    totBandwidth = txBandwidth + rxBandwidth;
+    totBytes = txBytes + rxBytes;
+    totPackets = txPackets + rxPackets;
+
     txPacketRate = txPackets / simSeconds;
     rxPacketRate = rxPackets / simSeconds;
 }
@@ -2353,6 +2383,7 @@ NSGigE::serialize(ostream &os)
     bool txPacketExists = txPacket;
     SERIALIZE_SCALAR(txPacketExists);
     if (txPacketExists) {
+        txPacket->length = txPacketBufPtr - txPacket->data;
         txPacket->serialize("txPacket", os);
         uint32_t txPktBufPtr = (uint32_t) (txPacketBufPtr - txPacket->data);
         SERIALIZE_SCALAR(txPktBufPtr);
@@ -2637,6 +2668,7 @@ REGISTER_SIM_OBJECT("NSGigEInt", NSGigEInt)
 
 BEGIN_DECLARE_SIM_OBJECT_PARAMS(NSGigE)
 
+    Param<Addr> addr;
     Param<Tick> tx_delay;
     Param<Tick> rx_delay;
     Param<Tick> intr_delay;
@@ -2644,7 +2676,7 @@ BEGIN_DECLARE_SIM_OBJECT_PARAMS(NSGigE)
     SimObjectParam<PhysicalMemory *> physmem;
     Param<bool> rx_filter;
     Param<string> hardware_address;
-    SimObjectParam<Bus*> header_bus;
+    SimObjectParam<Bus*> io_bus;
     SimObjectParam<Bus*> payload_bus;
     SimObjectParam<HierParams *> hier;
     Param<Tick> pio_latency;
@@ -2667,6 +2699,7 @@ END_DECLARE_SIM_OBJECT_PARAMS(NSGigE)
 
 BEGIN_INIT_SIM_OBJECT_PARAMS(NSGigE)
 
+    INIT_PARAM(addr, "Device Address"),
     INIT_PARAM_DFLT(tx_delay, "Transmit Delay", 1000),
     INIT_PARAM_DFLT(rx_delay, "Receive Delay", 1000),
     INIT_PARAM_DFLT(intr_delay, "Interrupt Delay in microseconds", 0),
@@ -2675,7 +2708,7 @@ BEGIN_INIT_SIM_OBJECT_PARAMS(NSGigE)
     INIT_PARAM_DFLT(rx_filter, "Enable Receive Filter", true),
     INIT_PARAM_DFLT(hardware_address, "Ethernet Hardware Address",
                     "00:99:00:00:00:01"),
-    INIT_PARAM_DFLT(header_bus, "The IO Bus to attach to for headers", NULL),
+    INIT_PARAM_DFLT(io_bus, "The IO Bus to attach to for headers", NULL),
     INIT_PARAM_DFLT(payload_bus, "The IO Bus to attach to for payload", NULL),
     INIT_PARAM_DFLT(hier, "Hierarchy global variables", &defaultHierParams),
     INIT_PARAM_DFLT(pio_latency, "Programmed IO latency in bus cycles", 1),
@@ -2715,7 +2748,7 @@ CREATE_SIM_OBJECT(NSGigE)
     params->tx_delay = tx_delay;
     params->rx_delay = rx_delay;
     params->hier = hier;
-    params->header_bus = header_bus;
+    params->header_bus = io_bus;
     params->payload_bus = payload_bus;
     params->pio_latency = pio_latency;
     params->dma_desc_free = dma_desc_free;
diff --git a/dev/ns_gige.hh b/dev/ns_gige.hh
index 8d6016126..58060edac 100644
--- a/dev/ns_gige.hh
+++ b/dev/ns_gige.hh
@@ -91,7 +91,6 @@ struct dp_rom {
     uint8_t perfectMatch[ETH_ADDR_LEN];
 };
 
-class IntrControl;
 class NSGigEInt;
 class PhysicalMemory;
 class BaseInterface;
@@ -262,12 +261,12 @@ class NSGigE : public PciDev
     void rxKick();
     Tick rxKickTick;
     typedef EventWrapper<NSGigE, &NSGigE::rxKick> RxKickEvent;
-    friend class RxKickEvent;
+    friend void RxKickEvent::process();
 
     void txKick();
     Tick txKickTick;
     typedef EventWrapper<NSGigE, &NSGigE::txKick> TxKickEvent;
-    friend class TxKickEvent;
+    friend void TxKickEvent::process();
 
     /**
      * Retransmit event
@@ -280,7 +279,7 @@ class NSGigE : public PciDev
             txKick();
     }
     typedef EventWrapper<NSGigE, &NSGigE::txEventTransmit> TxEvent;
-    friend class TxEvent;
+    friend void TxEvent::process();
     TxEvent txEvent;
 
     void txDump() const;
@@ -302,7 +301,6 @@ class NSGigE : public PciDev
     /**
      * Interrupt management
      */
-    IntrControl *intctrl;
     void devIntrPost(uint32_t interrupts);
     void devIntrClear(uint32_t interrupts);
     void devIntrChangeMask();
@@ -315,7 +313,7 @@ class NSGigE : public PciDev
     void cpuIntrClear();
 
     typedef EventWrapper<NSGigE, &NSGigE::cpuInterrupt> IntrEvent;
-    friend class IntrEvent;
+    friend void IntrEvent::process();
     IntrEvent *intrEvent;
     NSGigEInt *interface;
 
@@ -381,6 +379,10 @@ class NSGigE : public PciDev
     Stats::Scalar<> descDmaWrites;
     Stats::Scalar<> descDmaRdBytes;
     Stats::Scalar<> descDmaWrBytes;
+    Stats::Formula totBandwidth;
+    Stats::Formula totPackets;
+    Stats::Formula totBytes;
+    Stats::Formula totPacketRate;
     Stats::Formula txBandwidth;
     Stats::Formula rxBandwidth;
     Stats::Formula txPacketRate;
diff --git a/dev/pciconfigall.cc b/dev/pciconfigall.cc
index 609763e92..1a9804f79 100644
--- a/dev/pciconfigall.cc
+++ b/dev/pciconfigall.cc
@@ -48,9 +48,10 @@
 
 using namespace std;
 
-PciConfigAll::PciConfigAll(const string &name, Addr a, MemoryController *mmu,
+PciConfigAll::PciConfigAll(const string &name,
+                           Addr a, MemoryController *mmu,
                            HierParams *hier, Bus *bus, Tick pio_latency)
-    : PioDevice(name), addr(a)
+    : PioDevice(name, NULL), addr(a)
 {
     mmu->add_child(this, RangeSize(addr, size));
 
diff --git a/dev/pcidev.cc b/dev/pcidev.cc
index d156b6a02..c45afadd4 100644
--- a/dev/pcidev.cc
+++ b/dev/pcidev.cc
@@ -42,6 +42,7 @@
 #include "dev/pciareg.h"
 #include "dev/pcidev.hh"
 #include "dev/pciconfigall.hh"
+#include "mem/bus/bus.hh"
 #include "mem/functional_mem/memory_control.hh"
 #include "sim/builder.hh"
 #include "sim/param.hh"
@@ -51,7 +52,8 @@
 using namespace std;
 
 PciDev::PciDev(Params *p)
-    : DmaDevice(p->name), _params(p), plat(p->plat), configData(p->configData)
+    : DmaDevice(p->name, p->plat), _params(p), plat(p->plat),
+      configData(p->configData)
 {
     // copy the config data from the PciConfigData object
     if (configData) {
@@ -283,6 +285,11 @@ PciDev::unserialize(Checkpoint *cp, const std::string &section)
 
 BEGIN_DECLARE_SIM_OBJECT_PARAMS(PciConfigData)
 
+    SimObjectParam<MemoryController *> mmu;
+    Param<Addr> addr;
+    SimObjectParam<Bus*> io_bus;
+    Param<Tick> pio_latency;
+
     Param<uint16_t> VendorID;
     Param<uint16_t> DeviceID;
     Param<uint16_t> Command;
@@ -320,6 +327,11 @@ END_DECLARE_SIM_OBJECT_PARAMS(PciConfigData)
 
 BEGIN_INIT_SIM_OBJECT_PARAMS(PciConfigData)
 
+    INIT_PARAM(mmu, "Memory Controller"),
+    INIT_PARAM(addr, "Device Address"),
+    INIT_PARAM_DFLT(io_bus, "The IO Bus to attach to", NULL),
+    INIT_PARAM_DFLT(pio_latency, "Programmed IO latency in bus cycles", 1),
+
     INIT_PARAM(VendorID, "Vendor ID"),
     INIT_PARAM(DeviceID, "Device ID"),
     INIT_PARAM_DFLT(Command, "Command Register", 0x00),
diff --git a/dev/pcidev.hh b/dev/pcidev.hh
index 4b947b560..14f183e28 100644
--- a/dev/pcidev.hh
+++ b/dev/pcidev.hh
@@ -78,10 +78,6 @@ class PciConfigData : public SimObject
  */
 class PciDev : public DmaDevice
 {
-  protected:
-    struct Params;
-    Params *_params;
-
   public:
     struct Params
     {
@@ -110,6 +106,11 @@ class PciDev : public DmaDevice
         /** The function number */
         uint32_t functionNum;
     };
+
+  protected:
+    Params *_params;
+
+  public:
     const Params *params() const { return _params; }
 
   protected:
diff --git a/dev/pktfifo.cc b/dev/pktfifo.cc
index ae82123cf..dcb1c4c03 100644
--- a/dev/pktfifo.cc
+++ b/dev/pktfifo.cc
@@ -54,13 +54,12 @@ PacketFifo::unserialize(const string &base, Checkpoint *cp,
                         const string &section)
 {
     paramIn(cp, section, base + ".size", _size);
-    paramIn(cp, section, base + ".maxsize", _maxsize);
+//  paramIn(cp, section, base + ".maxsize", _maxsize);
     paramIn(cp, section, base + ".reserved", _reserved);
     int fifosize;
     paramIn(cp, section, base + ".packets", fifosize);
 
     fifo.clear();
-    fifo.resize(fifosize);
 
     for (int i = 0; i < fifosize; ++i) {
         PacketPtr p = new PacketData(16384);
diff --git a/dev/platform.hh b/dev/platform.hh
index 717e49411..47ca6209f 100644
--- a/dev/platform.hh
+++ b/dev/platform.hh
@@ -47,8 +47,6 @@ class Platform : public SimObject
   public:
     /** Pointer to the interrupt controller */
     IntrControl *intrctrl;
-    /** Pointer to the simulation console */
-    SimConsole *cons;
     /** Pointer to the PCI configuration space */
     PciConfigAll *pciconfig;
 
diff --git a/dev/rtcreg.h b/dev/rtcreg.h
new file mode 100644
index 000000000..8e1f51bfa
--- /dev/null
+++ b/dev/rtcreg.h
@@ -0,0 +1,44 @@
+
+/*
+ * Copyright (c) 2005 The Regents of The University of Michigan
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are
+ * met: redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer;
+ * redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution;
+ * neither the name of the copyright holders nor the names of its
+ * contributors may be used to endorse or promote products derived from
+ * this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
+ * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+ * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
+ * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
+ * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+#define RTC_SEC                 0x00
+#define RTC_SEC_ALRM            0x01
+#define RTC_MIN                 0x02
+#define RTC_MIN_ALRM            0x03
+#define RTC_HR                  0x04
+#define RTC_HR_ALRM             0x05
+#define RTC_DOW                 0x06
+#define RTC_DOM                 0x07
+#define RTC_MON                 0x08
+#define RTC_YEAR                0x09
+#define RTC_CNTRL_REGA          0x0A
+#define RTC_CNTRL_REGB          0x0B
+#define RTC_CNTRL_REGC          0x0C
+#define RTC_CNTRL_REGD          0x0D
+
diff --git a/dev/simconsole.cc b/dev/simconsole.cc
index d8d890e15..94fd9ec1f 100644
--- a/dev/simconsole.cc
+++ b/dev/simconsole.cc
@@ -43,6 +43,7 @@
 #include <string>
 
 #include "base/misc.hh"
+#include "base/output.hh"
 #include "base/socket.hh"
 #include "base/trace.hh"
 #include "dev/platform.hh"
@@ -71,7 +72,7 @@ SimConsole::Event::process(int revent)
         cons->detach();
 }
 
-SimConsole::SimConsole(const string &name, std::ostream *os, int num)
+SimConsole::SimConsole(const string &name, ostream *os, int num)
     : SimObject(name), event(NULL), number(num), in_fd(-1), out_fd(-1),
       listener(NULL), txbuf(16384), rxbuf(16384), outfile(os)
 #if TRACING_ON == 1
@@ -85,8 +86,6 @@ SimConsole::SimConsole(const string &name, std::ostream *os, int num)
 SimConsole::~SimConsole()
 {
     close();
-    if (outfile)
-        closeOutputStream(outfile);
 }
 
 void
@@ -313,18 +312,16 @@ END_INIT_SIM_OBJECT_PARAMS(SimConsole)
 
 CREATE_SIM_OBJECT(SimConsole)
 {
-    string filename;
+    string filename = output;
+    ostream *stream = NULL;
 
-    if (!output.isValid()) {
-        filename = getInstanceName();
-    } else if (append_name) {
-        filename = (string)output + "." + getInstanceName();
-    } else {
-        filename = output;
+    if (!filename.empty()) {
+        if (append_name)
+            filename += "." + getInstanceName();
+        stream = simout.find(filename);
     }
 
-    SimConsole *console = new SimConsole(getInstanceName(),
-                                         makeOutputStream(filename), number);
+    SimConsole *console = new SimConsole(getInstanceName(), stream, number);
     ((ConsoleListener *)listener)->add(console);
 
     return console;
diff --git a/dev/sinic.cc b/dev/sinic.cc
index 56782b589..fa4cd570f 100644
--- a/dev/sinic.cc
+++ b/dev/sinic.cc
@@ -191,6 +191,34 @@ Device::regStats()
         .prereq(rxBytes)
         ;
 
+    totBandwidth
+        .name(name() + ".totBandwidth")
+        .desc("Total Bandwidth (bits/s)")
+        .precision(0)
+        .prereq(totBytes)
+        ;
+
+    totPackets
+        .name(name() + ".totPackets")
+        .desc("Total Packets")
+        .precision(0)
+        .prereq(totBytes)
+        ;
+
+    totBytes
+        .name(name() + ".totBytes")
+        .desc("Total Bytes")
+        .precision(0)
+        .prereq(totBytes)
+        ;
+
+    totPacketRate
+        .name(name() + ".totPPS")
+        .desc("Total Tranmission Rate (packets/s)")
+        .precision(0)
+        .prereq(totBytes)
+        ;
+
     txBytes
         .name(name() + ".txBytes")
         .desc("Bytes Transmitted")
@@ -258,6 +286,9 @@ Device::regStats()
 
     txBandwidth = txBytes * Stats::constant(8) / simSeconds;
     rxBandwidth = rxBytes * Stats::constant(8) / simSeconds;
+    totBandwidth = txBandwidth + rxBandwidth;
+    totBytes = txBytes + rxBytes;
+    totPackets = txPackets + rxPackets;
     txPacketRate = txPackets / simSeconds;
     rxPacketRate = rxPackets / simSeconds;
 }
diff --git a/dev/sinic.hh b/dev/sinic.hh
index ef515ffad..9b8920f3b 100644
--- a/dev/sinic.hh
+++ b/dev/sinic.hh
@@ -59,7 +59,7 @@ class Base : public PciDev
     void cpuIntrClear();
 
     typedef EventWrapper<Base, &Base::cpuInterrupt> IntrEvent;
-    friend class IntrEvent;
+    friend void IntrEvent::process();
     IntrEvent *intrEvent;
     Interface *interface;
 
@@ -155,12 +155,12 @@ class Device : public Base
     void rxKick();
     Tick rxKickTick;
     typedef EventWrapper<Device, &Device::rxKick> RxKickEvent;
-    friend class RxKickEvent;
+    friend void RxKickEvent::process();
 
     void txKick();
     Tick txKickTick;
     typedef EventWrapper<Device, &Device::txKick> TxKickEvent;
-    friend class TxKickEvent;
+    friend void TxKickEvent::process();
 
     /**
      * Retransmit event
@@ -173,7 +173,7 @@ class Device : public Base
             txKick();
     }
     typedef EventWrapper<Device, &Device::txEventTransmit> TxEvent;
-    friend class TxEvent;
+    friend void TxEvent::process();
     TxEvent txEvent;
 
     void txDump() const;
@@ -262,6 +262,10 @@ class Device : public Base
 
     Stats::Scalar<> txBytes;
     Stats::Formula  txBandwidth;
+    Stats::Formula totBandwidth;
+    Stats::Formula totPackets;
+    Stats::Formula totBytes;
+    Stats::Formula totPacketRate;
     Stats::Scalar<> txPackets;
     Stats::Formula  txPacketRate;
     Stats::Scalar<> txIpPackets;
diff --git a/dev/tsunami.cc b/dev/tsunami.cc
index f98254354..a95b7365d 100644
--- a/dev/tsunami.cc
+++ b/dev/tsunami.cc
@@ -107,7 +107,6 @@ Tsunami::unserialize(Checkpoint *cp, const std::string &section)
 BEGIN_DECLARE_SIM_OBJECT_PARAMS(Tsunami)
 
     SimObjectParam<System *> system;
-    SimObjectParam<SimConsole *> cons;
     SimObjectParam<IntrControl *> intrctrl;
     SimObjectParam<PciConfigAll *> pciconfig;
     Param<int> interrupt_frequency;
@@ -117,7 +116,6 @@ END_DECLARE_SIM_OBJECT_PARAMS(Tsunami)
 BEGIN_INIT_SIM_OBJECT_PARAMS(Tsunami)
 
     INIT_PARAM(system, "system"),
-    INIT_PARAM(cons, "system console"),
     INIT_PARAM(intrctrl, "interrupt controller"),
     INIT_PARAM(pciconfig, "PCI configuration"),
     INIT_PARAM_DFLT(interrupt_frequency, "frequency of interrupts", 1024)
diff --git a/dev/tsunami.hh b/dev/tsunami.hh
index d7c549e90..7722c8417 100644
--- a/dev/tsunami.hh
+++ b/dev/tsunami.hh
@@ -32,8 +32,8 @@
  * retains pointers to all its children so the children can communicate.
  */
 
-#ifndef __TSUNAMI_HH__
-#define __TSUNAMI_HH__
+#ifndef __DEV_TSUNAMI_HH__
+#define __DEV_TSUNAMI_HH__
 
 #include "dev/platform.hh"
 
@@ -56,7 +56,6 @@ class System;
 class Tsunami : public Platform
 {
   public:
-
     /** Max number of CPUs in a Tsunami */
     static const int Max_CPUs = 64;
 
@@ -67,15 +66,15 @@ class Tsunami : public Platform
     TsunamiIO *io;
 
     /** Pointer to the Tsunami CChip.
-      * The chip contains some configuration information and
-      * all the interrupt mask and status registers
-      */
+     * The chip contains some configuration information and
+     * all the interrupt mask and status registers
+     */
     TsunamiCChip *cchip;
 
     /** Pointer to the Tsunami PChip.
-      * The pchip is the interface to the PCI bus, in our case
-      * it does not have to do much.
-      */
+     * The pchip is the interface to the PCI bus, in our case
+     * it does not have to do much.
+     */
     TsunamiPChip *pchip;
 
     int intr_sum_type[Tsunami::Max_CPUs];
@@ -83,12 +82,12 @@ class Tsunami : public Platform
 
   public:
     /**
-      * Constructor for the Tsunami Class.
-      * @param name name of the object
-      * @param con pointer to the console
-      * @param intrcontrol pointer to the interrupt controller
-      * @param intrFreq frequency that interrupts happen
-      */
+     * Constructor for the Tsunami Class.
+     * @param name name of the object
+     * @param con pointer to the console
+     * @param intrcontrol pointer to the interrupt controller
+     * @param intrFreq frequency that interrupts happen
+     */
     Tsunami(const std::string &name, System *s, IntrControl *intctrl,
             PciConfigAll *pci, int intrFreq);
 
@@ -96,7 +95,7 @@ class Tsunami : public Platform
      * Return the interrupting frequency to AlphaAccess
      * @return frequency of RTC interrupts
      */
-     virtual Tick intrFrequency();
+    virtual Tick intrFrequency();
 
     /**
      * Cause the cpu to post a serial interrupt to the CPU.
@@ -120,7 +119,7 @@ class Tsunami : public Platform
 
     virtual Addr pciToDma(Addr pciAddr) const;
 
-  /**
+    /**
      * Serialize this object to the given output stream.
      * @param os The stream to serialize to.
      */
@@ -134,4 +133,4 @@ class Tsunami : public Platform
     virtual void unserialize(Checkpoint *cp, const std::string &section);
 };
 
-#endif // __TSUNAMI_HH__
+#endif // __DEV_TSUNAMI_HH__
diff --git a/dev/tsunami_cchip.cc b/dev/tsunami_cchip.cc
index a1f900153..2fb293fbf 100644
--- a/dev/tsunami_cchip.cc
+++ b/dev/tsunami_cchip.cc
@@ -51,7 +51,7 @@ using namespace std;
 TsunamiCChip::TsunamiCChip(const string &name, Tsunami *t, Addr a,
                            MemoryController *mmu, HierParams *hier, Bus* bus,
                            Tick pio_latency)
-    : PioDevice(name), addr(a), tsunami(t)
+    : PioDevice(name, t), addr(a), tsunami(t)
 {
     mmu->add_child(this, RangeSize(addr, size));
 
@@ -173,6 +173,13 @@ TsunamiCChip::read(MemReqPtr &req, uint8_t *data)
 
       break;
       case sizeof(uint32_t):
+          if (regnum == TSDEV_CC_DRIR) {
+              warn("accessing DRIR with 32 bit read, "
+                   "hopefully your just reading this for timing");
+              *(uint32_t*)data = drir;
+          } else
+              panic("invalid access size(?) for tsunami register!\n");
+          return No_Fault;
       case sizeof(uint16_t):
       case sizeof(uint8_t):
       default:
diff --git a/dev/tsunami_io.cc b/dev/tsunami_io.cc
index 51ff8b81c..6c9195bff 100644
--- a/dev/tsunami_io.cc
+++ b/dev/tsunami_io.cc
@@ -1,5 +1,5 @@
 /*
- * Copyright (c) 2004 The Regents of The University of Michigan
+ * Copyright (c) 2004-2005 The Regents of The University of Michigan
  * All rights reserved.
  *
  * Redistribution and use in source and binary forms, with or without
@@ -45,6 +45,7 @@
 #include "sim/builder.hh"
 #include "dev/tsunami_cchip.hh"
 #include "dev/tsunamireg.h"
+#include "dev/rtcreg.h"
 #include "mem/functional_mem/memory_control.hh"
 
 using namespace std;
@@ -66,7 +67,6 @@ TsunamiIO::RTCEvent::process()
     schedule(curTick + ticksPerSecond/RTC_RATE);
     //Actually interrupt the processor here
     tsunami->cchip->postRTC();
-
 }
 
 const char *
@@ -162,7 +162,7 @@ TsunamiIO::ClockEvent::unserialize(Checkpoint *cp, const std::string &section)
 TsunamiIO::TsunamiIO(const string &name, Tsunami *t, time_t init_time,
                      Addr a, MemoryController *mmu, HierParams *hier, Bus *bus,
                      Tick pio_latency)
-    : PioDevice(name), addr(a), tsunami(t), rtc(t)
+    : PioDevice(name, t), addr(a), tsunami(t), rtc(t)
 {
     mmu->add_child(this, RangeSize(addr, size));
 
@@ -217,36 +217,36 @@ TsunamiIO::read(MemReqPtr &req, uint8_t *data)
             return No_Fault;
           case TSDEV_RTC_DATA:
             switch(RTCAddress) {
-              case RTC_CONTROL_REGISTERA:
+              case RTC_CNTRL_REGA:
                 *(uint8_t*)data = uip << 7 | 0x26;
                 uip = !uip;
                 return No_Fault;
-              case RTC_CONTROL_REGISTERB:
+              case RTC_CNTRL_REGB:
                 // DM and 24/12 and UIE
                 *(uint8_t*)data = 0x46;
                 return No_Fault;
-              case RTC_CONTROL_REGISTERC:
+              case RTC_CNTRL_REGC:
                 // If we want to support RTC user access in linux
                 // This won't work, but for now it's fine
                 *(uint8_t*)data = 0x00;
                 return No_Fault;
-              case RTC_CONTROL_REGISTERD:
+              case RTC_CNTRL_REGD:
                 panic("RTC Control Register D not implemented");
-              case RTC_SECOND:
+              case RTC_SEC:
                 *(uint8_t *)data = tm.tm_sec;
                 return No_Fault;
-              case RTC_MINUTE:
+              case RTC_MIN:
                 *(uint8_t *)data = tm.tm_min;
                 return No_Fault;
-              case RTC_HOUR:
+              case RTC_HR:
                 *(uint8_t *)data = tm.tm_hour;
                 return No_Fault;
-              case RTC_DAY_OF_WEEK:
+              case RTC_DOW:
                 *(uint8_t *)data = tm.tm_wday;
                 return No_Fault;
-              case RTC_DAY_OF_MONTH:
+              case RTC_DOM:
                 *(uint8_t *)data = tm.tm_mday;
-              case RTC_MONTH:
+              case RTC_MON:
                 *(uint8_t *)data = tm.tm_mon + 1;
                 return No_Fault;
               case RTC_YEAR:
diff --git a/dev/tsunami_io.hh b/dev/tsunami_io.hh
index d507355c3..a9f044ec9 100644
--- a/dev/tsunami_io.hh
+++ b/dev/tsunami_io.hh
@@ -30,8 +30,8 @@
  * Tsunami Fake I/O Space mapping including RTC/timer interrupts
  */
 
-#ifndef __TSUNAMI_DMA_HH__
-#define __TSUNAMI_DMA_HH__
+#ifndef __DEV_TSUNAMI_IO_HH__
+#define __DEV_TSUNAMI_IO_HH__
 
 #include "dev/io_device.hh"
 #include "base/range.hh"
@@ -56,9 +56,11 @@ class TsunamiIO : public PioDevice
 
     struct tm tm;
 
-    /** In Tsunami RTC only has two i/o ports one for data and one for address,
-     * so you write the address and then read/write the data. This store the
-     * address you are going to be reading from on a read.
+    /**
+     * In Tsunami RTC only has two i/o ports one for data and one for
+     * address, so you write the address and then read/write the
+     * data. This store the address you are going to be reading from
+     * on a read.
      */
     uint8_t RTCAddress;
 
@@ -132,38 +134,37 @@ class TsunamiIO : public PioDevice
     class RTCEvent : public Event
     {
       protected:
-          /** A pointer back to tsunami to create interrupt the processor. */
-          Tsunami* tsunami;
+        /** A pointer back to tsunami to create interrupt the processor. */
+        Tsunami* tsunami;
       public:
-          /** RTC Event initializes the RTC event by scheduling an event
-           * RTC_RATE times pre second. */
-          RTCEvent(Tsunami* t);
-
-          /**
-           * Interrupth the processor and reschedule the event.
-           * */
-          virtual void process();
-
-          /**
-           * Return a description of this event.
-           * @return a description
-           */
-          virtual const char *description();
-
-          /**
-           * Serialize this object to the given output stream.
-           * @param os The stream to serialize to.
-           */
-          virtual void serialize(std::ostream &os);
-
-
-          /**
-           * Reconstruct the state of this object from a checkpoint.
-           * @param cp The checkpoint use.
-           * @param section The section name of this object
-           */
-          virtual void unserialize(Checkpoint *cp, const std::string &section);
-     };
+        /** RTC Event initializes the RTC event by scheduling an event
+         * RTC_RATE times pre second. */
+        RTCEvent(Tsunami* t);
+
+        /**
+         * Interrupth the processor and reschedule the event.
+         */
+        virtual void process();
+
+        /**
+         * Return a description of this event.
+         * @return a description
+         */
+        virtual const char *description();
+
+        /**
+         * Serialize this object to the given output stream.
+         * @param os The stream to serialize to.
+         */
+        virtual void serialize(std::ostream &os);
+
+        /**
+         * Reconstruct the state of this object from a checkpoint.
+         * @param cp The checkpoint use.
+         * @param section The section name of this object
+         */
+        virtual void unserialize(Checkpoint *cp, const std::string &section);
+    };
 
     /** uip UpdateInProgess says that the rtc is updating, but we just fake it
      * by alternating it on every read of the bit since we are going to
@@ -219,7 +220,6 @@ class TsunamiIO : public PioDevice
      */
     uint32_t timerData;
 
-
   public:
     /**
      * Return the freqency of the RTC
@@ -227,7 +227,6 @@ class TsunamiIO : public PioDevice
      */
     Tick  frequency() const { return RTC_RATE; }
 
-
     /**
      * Initialize all the data for devices supported by Tsunami I/O.
      * @param name name of this device.
@@ -279,7 +278,6 @@ class TsunamiIO : public PioDevice
      */
     virtual void serialize(std::ostream &os);
 
-
     /**
      * Reconstruct the state of this object from a checkpoint.
      * @param cp The checkpoint use.
@@ -287,8 +285,7 @@ class TsunamiIO : public PioDevice
      */
     virtual void unserialize(Checkpoint *cp, const std::string &section);
 
-
     Tick cacheAccess(MemReqPtr &req);
 };
 
-#endif // __TSUNAMI_IO_HH__
+#endif // __DEV_TSUNAMI_IO_HH__
diff --git a/dev/tsunami_pchip.cc b/dev/tsunami_pchip.cc
index 9af19d930..f846725f9 100644
--- a/dev/tsunami_pchip.cc
+++ b/dev/tsunami_pchip.cc
@@ -51,7 +51,7 @@ using namespace std;
 TsunamiPChip::TsunamiPChip(const string &name, Tsunami *t, Addr a,
                            MemoryController *mmu, HierParams *hier,
                            Bus *bus, Tick pio_latency)
-    : PioDevice(name), addr(a), tsunami(t)
+    : PioDevice(name, t), addr(a), tsunami(t)
 {
     mmu->add_child(this, RangeSize(addr, size));
 
diff --git a/dev/tsunamireg.h b/dev/tsunamireg.h
index 3304082a5..290f21a5b 100644
--- a/dev/tsunamireg.h
+++ b/dev/tsunamireg.h
@@ -122,23 +122,6 @@
 #define TSDEV_RTC_ADDR      0x70
 #define TSDEV_RTC_DATA      0x71
 
-// RTC defines
-#define RTC_SECOND          0	// second of minute [0..59]
-#define RTC_SECOND_ALARM    1	// seconds to alarm
-#define RTC_MINUTE          2	// minute of hour [0..59]
-#define RTC_MINUTE_ALARM    3	// minutes to alarm
-#define RTC_HOUR            4	// hour of day [0..23]
-#define RTC_HOUR_ALARM      5	// hours to alarm
-#define RTC_DAY_OF_WEEK     6	// day of week [1..7]
-#define RTC_DAY_OF_MONTH    7	// day of month [1..31]
-#define RTC_MONTH           8	// month of year [1..12]
-#define RTC_YEAR            9	// year [00..99]
-#define RTC_CONTROL_REGISTERA   10	// control register A
-#define RTC_CONTROL_REGISTERB   11	// control register B
-#define RTC_CONTROL_REGISTERC   12	// control register C
-#define RTC_CONTROL_REGISTERD   13	// control register D
-#define RTC_REGNUMBER_RTC_CR1   0x6A	// control register 1
-
 #define PCHIP_PCI0_MEMORY       ULL(0x00000000000)
 #define PCHIP_PCI0_IO           ULL(0x001FC000000)
 #define TSUNAMI_UNCACHABLE_BIT  ULL(0x80000000000)
diff --git a/dev/uart.cc b/dev/uart.cc
index 2ff94dda5..3c4ab6d04 100644
--- a/dev/uart.cc
+++ b/dev/uart.cc
@@ -88,8 +88,8 @@ Uart::IntrEvent::scheduleIntr()
 
 Uart::Uart(const string &name, SimConsole *c, MemoryController *mmu, Addr a,
            Addr s, HierParams *hier, Bus *bus, Tick pio_latency, Platform *p)
-    : PioDevice(name), addr(a), size(s), cons(c), txIntrEvent(this, TX_INT),
-      rxIntrEvent(this, RX_INT), platform(p)
+    : PioDevice(name, p), addr(a), size(s), cons(c),
+      txIntrEvent(this, TX_INT), rxIntrEvent(this, RX_INT)
 {
     mmu->add_child(this, RangeSize(addr, size));
 
diff --git a/dev/uart.hh b/dev/uart.hh
index 855915840..d1f167526 100644
--- a/dev/uart.hh
+++ b/dev/uart.hh
@@ -72,7 +72,6 @@ class Uart : public PioDevice
 
     IntrEvent txIntrEvent;
     IntrEvent rxIntrEvent;
-    Platform *platform;
 
   public:
     Uart(const std::string &name, SimConsole *c, MemoryController *mmu,