summaryrefslogtreecommitdiff
path: root/dev
diff options
context:
space:
mode:
Diffstat (limited to 'dev')
-rw-r--r--dev/alpha_console.cc17
-rw-r--r--dev/alpha_console.hh5
-rw-r--r--dev/baddev.cc28
-rw-r--r--dev/baddev.hh2
-rw-r--r--dev/ide_ctrl.cc2
-rw-r--r--dev/ide_ctrl.hh2
-rw-r--r--dev/ide_disk.cc2
-rw-r--r--dev/ide_disk.hh2
-rw-r--r--dev/ns_gige.cc2
-rw-r--r--dev/ns_gige.hh2
-rw-r--r--dev/pciconfigall.cc2
-rw-r--r--dev/pciconfigall.hh2
-rw-r--r--dev/pcidev.cc2
-rw-r--r--dev/pcidev.hh2
-rw-r--r--dev/pcireg.h2
-rw-r--r--dev/platform.cc2
-rw-r--r--dev/platform.hh3
-rw-r--r--dev/tsunami.cc8
-rw-r--r--dev/tsunami.hh8
-rw-r--r--dev/tsunami_cchip.cc39
-rw-r--r--dev/tsunami_cchip.hh2
-rw-r--r--dev/tsunami_io.cc2
-rw-r--r--dev/tsunami_io.hh9
-rw-r--r--dev/tsunami_pchip.cc36
-rw-r--r--dev/tsunami_pchip.hh2
-rw-r--r--dev/tsunamireg.h31
26 files changed, 167 insertions, 49 deletions
diff --git a/dev/alpha_console.cc b/dev/alpha_console.cc
index 111b23c81..3d2ad0ec6 100644
--- a/dev/alpha_console.cc
+++ b/dev/alpha_console.cc
@@ -55,7 +55,7 @@
using namespace std;
AlphaConsole::AlphaConsole(const string &name, SimConsole *cons, SimpleDisk *d,
- System *system, BaseCPU *cpu, SimObject *clock,
+ System *system, BaseCPU *cpu, Platform *platform,
int num_cpus, MemoryController *mmu, Addr a,
HierParams *hier, Bus *bus)
: PioDevice(name), disk(d), console(cons), addr(a)
@@ -80,14 +80,7 @@ AlphaConsole::AlphaConsole(const string &name, SimConsole *cons, SimpleDisk *d,
alphaAccess->numCPUs = num_cpus;
alphaAccess->mem_size = system->physmem->size();
alphaAccess->cpuClock = cpu->getFreq() / 1000000;
- TsunamiIO *clock_linux = dynamic_cast<TsunamiIO *>(clock);
- TlaserClock *clock_tru64 = dynamic_cast<TlaserClock *>(clock);
- if (clock_linux)
- alphaAccess->intrClockFrequency = clock_linux->frequency();
- else if (clock_tru64)
- alphaAccess->intrClockFrequency = clock_tru64->frequency();
- else
- panic("clock must be of type TlaserClock or TsunamiIO\n");
+ alphaAccess->intrClockFrequency = platform->intrFrequency();
alphaAccess->diskUnit = 1;
}
@@ -274,7 +267,7 @@ BEGIN_DECLARE_SIM_OBJECT_PARAMS(AlphaConsole)
Param<Addr> addr;
SimObjectParam<System *> system;
SimObjectParam<BaseCPU *> cpu;
- SimObjectParam<SimObject *> clock;
+ SimObjectParam<Platform *> platform;
SimObjectParam<Bus*> io_bus;
SimObjectParam<HierParams *> hier;
@@ -289,7 +282,7 @@ BEGIN_INIT_SIM_OBJECT_PARAMS(AlphaConsole)
INIT_PARAM(addr, "Device Address"),
INIT_PARAM(system, "system object"),
INIT_PARAM(cpu, "Processor"),
- INIT_PARAM(clock, "Clock"),
+ INIT_PARAM(platform, "platform"),
INIT_PARAM_DFLT(io_bus, "The IO Bus to attach to", NULL),
INIT_PARAM_DFLT(hier, "Hierarchy global variables", &defaultHierParams)
@@ -298,7 +291,7 @@ END_INIT_SIM_OBJECT_PARAMS(AlphaConsole)
CREATE_SIM_OBJECT(AlphaConsole)
{
return new AlphaConsole(getInstanceName(), sim_console, disk,
- system, cpu, clock, num_cpus, mmu,
+ system, cpu, platform, num_cpus, mmu,
addr, hier, io_bus);
}
diff --git a/dev/alpha_console.hh b/dev/alpha_console.hh
index 4986d0e5f..fa527dc32 100644
--- a/dev/alpha_console.hh
+++ b/dev/alpha_console.hh
@@ -37,13 +37,12 @@
#include "dev/alpha_access.h"
#include "dev/io_device.hh"
#include "sim/host.hh"
-#include "dev/tsunami_io.hh"
#include "sim/sim_object.hh"
class BaseCPU;
class SimConsole;
class System;
-class TlaserClock;
+class Platform;
class SimpleDisk;
/*
@@ -91,7 +90,7 @@ class AlphaConsole : public PioDevice
public:
/** Standard Constructor */
AlphaConsole(const std::string &name, SimConsole *cons, SimpleDisk *d,
- System *system, BaseCPU *cpu, SimObject *clock,
+ System *system, BaseCPU *cpu, Platform *platform,
int num_cpus, MemoryController *mmu, Addr addr,
HierParams *hier, Bus *bus);
diff --git a/dev/baddev.cc b/dev/baddev.cc
index 8a5d68533..d2f78ef87 100644
--- a/dev/baddev.cc
+++ b/dev/baddev.cc
@@ -1,4 +1,30 @@
-/* $Id$ */
+/*
+ * Copyright (c) 2004 The Regents of The University of Michigan
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are
+ * met: redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer;
+ * redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution;
+ * neither the name of the copyright holders nor the names of its
+ * contributors may be used to endorse or promote products derived from
+ * this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
+ * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+ * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
+ * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
+ * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
/* @file
* BadDevice implemenation
diff --git a/dev/baddev.hh b/dev/baddev.hh
index e0304d5d5..348d0db22 100644
--- a/dev/baddev.hh
+++ b/dev/baddev.hh
@@ -1,5 +1,5 @@
/*
- * Copyright (c) 2003 The Regents of The University of Michigan
+ * Copyright (c) 2004 The Regents of The University of Michigan
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
diff --git a/dev/ide_ctrl.cc b/dev/ide_ctrl.cc
index f78a8e1ef..ae7525c2c 100644
--- a/dev/ide_ctrl.cc
+++ b/dev/ide_ctrl.cc
@@ -1,5 +1,5 @@
/*
- * Copyright (c) 2003 The Regents of The University of Michigan
+ * Copyright (c) 2004 The Regents of The University of Michigan
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
diff --git a/dev/ide_ctrl.hh b/dev/ide_ctrl.hh
index 9698724c1..cfdef8e3a 100644
--- a/dev/ide_ctrl.hh
+++ b/dev/ide_ctrl.hh
@@ -1,5 +1,5 @@
/*
- * Copyright (c) 2003 The Regents of The University of Michigan
+ * Copyright (c) 2004 The Regents of The University of Michigan
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
diff --git a/dev/ide_disk.cc b/dev/ide_disk.cc
index dcaaf64c8..df365bab9 100644
--- a/dev/ide_disk.cc
+++ b/dev/ide_disk.cc
@@ -1,5 +1,5 @@
/*
- * Copyright (c) 2003 The Regents of The University of Michigan
+ * Copyright (c) 2004 The Regents of The University of Michigan
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
diff --git a/dev/ide_disk.hh b/dev/ide_disk.hh
index 8f1d582c9..409aaef9a 100644
--- a/dev/ide_disk.hh
+++ b/dev/ide_disk.hh
@@ -1,5 +1,5 @@
/*
- * Copyright (c) 2003 The Regents of The University of Michigan
+ * Copyright (c) 2004 The Regents of The University of Michigan
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
diff --git a/dev/ns_gige.cc b/dev/ns_gige.cc
index 0b54d9210..f3a82781c 100644
--- a/dev/ns_gige.cc
+++ b/dev/ns_gige.cc
@@ -1,5 +1,5 @@
/*
- * Copyright (c) 2003 The Regents of The University of Michigan
+ * Copyright (c) 2004 The Regents of The University of Michigan
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
diff --git a/dev/ns_gige.hh b/dev/ns_gige.hh
index ff648adcf..d2f234bca 100644
--- a/dev/ns_gige.hh
+++ b/dev/ns_gige.hh
@@ -1,5 +1,5 @@
/*
- * Copyright (c) 2003 The Regents of The University of Michigan
+ * Copyright (c) 2004 The Regents of The University of Michigan
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
diff --git a/dev/pciconfigall.cc b/dev/pciconfigall.cc
index 226fd2749..949124c8c 100644
--- a/dev/pciconfigall.cc
+++ b/dev/pciconfigall.cc
@@ -1,5 +1,5 @@
/*
- * Copyright (c) 2003 The Regents of The University of Michigan
+ * Copyright (c) 2004 The Regents of The University of Michigan
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
diff --git a/dev/pciconfigall.hh b/dev/pciconfigall.hh
index 6a31a9e73..7356e7279 100644
--- a/dev/pciconfigall.hh
+++ b/dev/pciconfigall.hh
@@ -1,5 +1,5 @@
/*
- * Copyright (c) 2003 The Regents of The University of Michigan
+ * Copyright (c) 2004 The Regents of The University of Michigan
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
diff --git a/dev/pcidev.cc b/dev/pcidev.cc
index 8d2828809..191233348 100644
--- a/dev/pcidev.cc
+++ b/dev/pcidev.cc
@@ -1,5 +1,5 @@
/*
- * Copyright (c) 2003 The Regents of The University of Michigan
+ * Copyright (c) 2004 The Regents of The University of Michigan
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
diff --git a/dev/pcidev.hh b/dev/pcidev.hh
index 1c4de18ad..c0fe47ac4 100644
--- a/dev/pcidev.hh
+++ b/dev/pcidev.hh
@@ -1,5 +1,5 @@
/*
- * Copyright (c) 2003 The Regents of The University of Michigan
+ * Copyright (c) 2004 The Regents of The University of Michigan
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
diff --git a/dev/pcireg.h b/dev/pcireg.h
index 2921c30be..dcf6b6d12 100644
--- a/dev/pcireg.h
+++ b/dev/pcireg.h
@@ -1,5 +1,5 @@
/*
- * Copyright (c) 2003 The Regents of The University of Michigan
+ * Copyright (c) 2004 The Regents of The University of Michigan
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
diff --git a/dev/platform.cc b/dev/platform.cc
index c39849162..8515d543a 100644
--- a/dev/platform.cc
+++ b/dev/platform.cc
@@ -1,5 +1,5 @@
/*
- * Copyright (c) 2003 The Regents of The University of Michigan
+ * Copyright (c) 2004 The Regents of The University of Michigan
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
diff --git a/dev/platform.hh b/dev/platform.hh
index 407f58406..f0e3d291b 100644
--- a/dev/platform.hh
+++ b/dev/platform.hh
@@ -1,5 +1,5 @@
/*
- * Copyright (c) 2003 The Regents of The University of Michigan
+ * Copyright (c) 2004 The Regents of The University of Michigan
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
@@ -60,6 +60,7 @@ class Platform : public SimObject
virtual ~Platform() {}
virtual void postConsoleInt() = 0;
virtual void clearConsoleInt() = 0;
+ virtual Tick intrFrequency() = 0;
};
#endif // __PLATFORM_HH_
diff --git a/dev/tsunami.cc b/dev/tsunami.cc
index 8956ee557..1cdd7d726 100644
--- a/dev/tsunami.cc
+++ b/dev/tsunami.cc
@@ -1,5 +1,5 @@
/*
- * Copyright (c) 2003 The Regents of The University of Michigan
+ * Copyright (c) 2004 The Regents of The University of Michigan
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
@@ -56,6 +56,12 @@ Tsunami::Tsunami(const string &name, System *s,
intr_sum_type[i] = 0;
}
+Tick
+Tsunami::intrFrequency()
+{
+ return io->frequency();
+}
+
void
Tsunami::postConsoleInt()
{
diff --git a/dev/tsunami.hh b/dev/tsunami.hh
index c5dbe797b..db266d62d 100644
--- a/dev/tsunami.hh
+++ b/dev/tsunami.hh
@@ -1,5 +1,5 @@
/*
- * Copyright (c) 2003 The Regents of The University of Michigan
+ * Copyright (c) 2004 The Regents of The University of Michigan
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
@@ -96,6 +96,12 @@ class Tsunami : public Platform
PciConfigAll *pci, int intrFreq);
/**
+ * Return the interrupting frequency to AlphaAccess
+ * @return frequency of RTC interrupts
+ */
+ virtual Tick intrFrequency();
+
+ /**
* Cause the cpu to post a serial interrupt to the CPU.
*/
virtual void postConsoleInt();
diff --git a/dev/tsunami_cchip.cc b/dev/tsunami_cchip.cc
index ba49c361b..0700cf49a 100644
--- a/dev/tsunami_cchip.cc
+++ b/dev/tsunami_cchip.cc
@@ -1,4 +1,30 @@
-/* $Id$ */
+/*
+ * Copyright (c) 2004 The Regents of The University of Michigan
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are
+ * met: redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer;
+ * redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution;
+ * neither the name of the copyright holders nor the names of its
+ * contributors may be used to endorse or promote products derived from
+ * this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
+ * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+ * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
+ * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
+ * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
/* @file
* Emulation of the Tsunami CChip CSRs
@@ -68,7 +94,7 @@ TsunamiCChip::read(MemReqPtr &req, uint8_t *data)
case TSDEV_CC_AAR1:
case TSDEV_CC_AAR2:
case TSDEV_CC_AAR3:
- panic("TSDEV_CC_AARx not implemeted\n");
+ *(uint64_t*)data = 0;
return No_Fault;
case TSDEV_CC_DIM0:
*(uint64_t*)data = dim[0];
@@ -131,8 +157,8 @@ TsunamiCChip::read(MemReqPtr &req, uint8_t *data)
Fault
TsunamiCChip::write(MemReqPtr &req, const uint8_t *data)
{
- DPRINTF(Tsunami, "write - va=%#x size=%d \n",
- req->vaddr, req->size);
+ DPRINTF(Tsunami, "write - va=%#x value=%#x size=%d \n",
+ req->vaddr, *(uint64_t*)data, req->size);
Addr daddr = (req->paddr - (addr & PA_IMPL_MASK)) >> 6;
@@ -195,6 +221,11 @@ TsunamiCChip::write(MemReqPtr &req, const uint8_t *data)
}
supportedWrite = true;
}
+
+ // ignore NXMs
+ if (*(uint64_t*)data & 0x10000000)
+ supportedWrite = true;
+
if(!supportedWrite) panic("TSDEV_CC_MISC write not implemented\n");
return No_Fault;
case TSDEV_CC_AAR0:
diff --git a/dev/tsunami_cchip.hh b/dev/tsunami_cchip.hh
index 79fadf06a..2e7ce1af9 100644
--- a/dev/tsunami_cchip.hh
+++ b/dev/tsunami_cchip.hh
@@ -1,5 +1,5 @@
/*
- * Copyright (c) 2003 The Regents of The University of Michigan
+ * Copyright (c) 2004 The Regents of The University of Michigan
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
diff --git a/dev/tsunami_io.cc b/dev/tsunami_io.cc
index 2dda86fbc..b902306a4 100644
--- a/dev/tsunami_io.cc
+++ b/dev/tsunami_io.cc
@@ -1,5 +1,5 @@
/*
- * Copyright (c) 2003 The Regents of The University of Michigan
+ * Copyright (c) 2004 The Regents of The University of Michigan
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
diff --git a/dev/tsunami_io.hh b/dev/tsunami_io.hh
index 1dd7762e3..d091689ec 100644
--- a/dev/tsunami_io.hh
+++ b/dev/tsunami_io.hh
@@ -1,5 +1,5 @@
/*
- * Copyright (c) 2003 The Regents of The University of Michigan
+ * Copyright (c) 2004 The Regents of The University of Michigan
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
@@ -192,8 +192,11 @@ class TsunamiIO : public FunctionalMemory
public:
- /** Return the freqency of the RTC */
- uint32_t frequency() const { return RTC_RATE; }
+ /**
+ * Return the freqency of the RTC
+ * @return interrupt rate of the RTC
+ */
+ Tick frequency() const { return RTC_RATE; }
/**
diff --git a/dev/tsunami_pchip.cc b/dev/tsunami_pchip.cc
index 6a9cb7931..e65b235bd 100644
--- a/dev/tsunami_pchip.cc
+++ b/dev/tsunami_pchip.cc
@@ -1,4 +1,30 @@
-/* $Id$ */
+/*
+ * Copyright (c) 2004 The Regents of The University of Michigan
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are
+ * met: redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer;
+ * redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution;
+ * neither the name of the copyright holders nor the names of its
+ * contributors may be used to endorse or promote products derived from
+ * this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
+ * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+ * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
+ * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
+ * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
/* @file
* Tsunami PChip (pci)
@@ -99,9 +125,11 @@ TsunamiPChip::read(MemReqPtr &req, uint8_t *data)
case TSDEV_PC_RES:
panic("PC_RES not implemented\n");
case TSDEV_PC_PERROR:
- panic("PC_PERROR not implemented\n");
+ *(uint64_t*)data = 0x00;
+ return No_Fault;
case TSDEV_PC_PERRMASK:
- panic("PC_PERRMASK not implemented\n");
+ *(uint64_t*)data = 0x00;
+ return No_Fault;
case TSDEV_PC_PERRSET:
panic("PC_PERRSET not implemented\n");
case TSDEV_PC_TLBIV:
@@ -186,7 +214,7 @@ TsunamiPChip::write(MemReqPtr &req, const uint8_t *data)
case TSDEV_PC_RES:
panic("PC_RES not implemented\n");
case TSDEV_PC_PERROR:
- panic("PC_PERROR not implemented\n");
+ return No_Fault;
case TSDEV_PC_PERRMASK:
panic("PC_PERRMASK not implemented\n");
case TSDEV_PC_PERRSET:
diff --git a/dev/tsunami_pchip.hh b/dev/tsunami_pchip.hh
index 2c8da7ecc..f3c250d71 100644
--- a/dev/tsunami_pchip.hh
+++ b/dev/tsunami_pchip.hh
@@ -1,5 +1,5 @@
/*
- * Copyright (c) 2003 The Regents of The University of Michigan
+ * Copyright (c) 2004 The Regents of The University of Michigan
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
diff --git a/dev/tsunamireg.h b/dev/tsunamireg.h
index 927dd60c9..58d5b63e1 100644
--- a/dev/tsunamireg.h
+++ b/dev/tsunamireg.h
@@ -1,8 +1,35 @@
+/*
+ * Copyright (c) 2004 The Regents of The University of Michigan
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are
+ * met: redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer;
+ * redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution;
+ * neither the name of the copyright holders nor the names of its
+ * contributors may be used to endorse or promote products derived from
+ * this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
+ * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+ * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
+ * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
+ * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
#ifndef __TSUNAMIREG_H__
#define __TSUNAMIREG_H__
-#define ALPHA_K0SEG_BASE 0xfffffc0000000000ULL
+#define ALPHA_K0SEG_BASE ULL(0xfffffc0000000000)
// CChip Registers
#define TSDEV_CC_CSR 0x00
@@ -112,8 +139,6 @@
// UART Defines
-
-
#define UART_IER_THRI 0x02
#define UART_IER_RLSI 0x04