diff options
Diffstat (limited to 'dev')
| -rw-r--r-- | dev/alpha_console.cc | 36 | ||||
| -rw-r--r-- | dev/alpha_console.hh | 15 | ||||
| -rw-r--r-- | dev/etherdump.cc | 20 | ||||
| -rw-r--r-- | dev/etherlink.cc | 180 | ||||
| -rw-r--r-- | dev/etherlink.hh | 38 | ||||
| -rw-r--r-- | dev/etherpkt.cc | 50 | ||||
| -rw-r--r-- | dev/etherpkt.hh | 1 | ||||
| -rw-r--r-- | dev/io_device.cc | 52 | ||||
| -rw-r--r-- | dev/io_device.hh | 59 | ||||
| -rw-r--r-- | dev/pciconfigall.cc | 28 | ||||
| -rw-r--r-- | dev/pciconfigall.hh | 4 | ||||
| -rw-r--r-- | dev/pcidev.cc | 2 | ||||
| -rw-r--r-- | dev/pcidev.hh | 6 | ||||
| -rw-r--r-- | dev/tsunami.hh | 4 |
14 files changed, 412 insertions, 83 deletions
diff --git a/dev/alpha_console.cc b/dev/alpha_console.cc index ad9d0a239..2e9e09e93 100644 --- a/dev/alpha_console.cc +++ b/dev/alpha_console.cc @@ -43,6 +43,9 @@ #include "dev/console.hh" #include "dev/simple_disk.hh" #include "dev/tlaser_clock.hh" +#include "mem/bus/bus.hh" +#include "mem/bus/pio_interface.hh" +#include "mem/bus/pio_interface_impl.hh" #include "mem/functional_mem/memory_control.hh" #include "sim/builder.hh" #include "sim/system.hh" @@ -50,14 +53,20 @@ using namespace std; -AlphaConsole::AlphaConsole(const string &name, SimConsole *cons, - SimpleDisk *d, System *system, - BaseCPU *cpu, TsunamiIO *clock, int num_cpus, - Addr a, MemoryController *mmu) - : FunctionalMemory(name), disk(d), console(cons), addr(a) +AlphaConsole::AlphaConsole(const string &name, SimConsole *cons, SimpleDisk *d, + System *system, BaseCPU *cpu, TsunamiIO *clock, + int num_cpus, MemoryController *mmu, Addr a, + HierParams *hier, Bus *bus) + : PioDevice(name), disk(d), console(cons), addr(a) { mmu->add_child(this, Range<Addr>(addr, addr + size)); + if (bus) { + pioInterface = newPioInterface(name, hier, bus, this, + &AlphaConsole::cacheAccess); + pioInterface->addAddrRange(addr, addr + size); + } + consoleData = new uint8_t[size]; memset(consoleData, 0, size); @@ -185,6 +194,12 @@ AlphaConsole::write(MemReqPtr &req, const uint8_t *data) return No_Fault; } +Tick +AlphaConsole::cacheAccess(MemReqPtr &req) +{ + return curTick + 1000; +} + void AlphaAccess::serialize(ostream &os) { @@ -253,6 +268,8 @@ BEGIN_DECLARE_SIM_OBJECT_PARAMS(AlphaConsole) SimObjectParam<System *> system; SimObjectParam<BaseCPU *> cpu; SimObjectParam<TsunamiIO *> clock; + SimObjectParam<Bus*> io_bus; + SimObjectParam<HierParams *> hier; END_DECLARE_SIM_OBJECT_PARAMS(AlphaConsole) @@ -265,14 +282,17 @@ BEGIN_INIT_SIM_OBJECT_PARAMS(AlphaConsole) INIT_PARAM(addr, "Device Address"), INIT_PARAM(system, "system object"), INIT_PARAM(cpu, "Processor"), - INIT_PARAM(clock, "Turbolaser Clock") + INIT_PARAM(clock, "Turbolaser Clock"), + INIT_PARAM_DFLT(io_bus, "The IO Bus to attach to", NULL), + INIT_PARAM_DFLT(hier, "Hierarchy global variables", &defaultHierParams) END_INIT_SIM_OBJECT_PARAMS(AlphaConsole) CREATE_SIM_OBJECT(AlphaConsole) { - return new AlphaConsole(getInstanceName(), sim_console, disk, - system, cpu, clock, num_cpus, addr, mmu); + return new AlphaConsole(getInstanceName(), sim_console, disk, + system, cpu, clock, num_cpus, mmu, + addr, hier, io_bus); } REGISTER_SIM_OBJECT("AlphaConsole", AlphaConsole) diff --git a/dev/alpha_console.hh b/dev/alpha_console.hh index d0fa552af..be8538e50 100644 --- a/dev/alpha_console.hh +++ b/dev/alpha_console.hh @@ -35,7 +35,7 @@ #include "base/range.hh" #include "dev/alpha_access.h" -#include "mem/functional_mem/functional_memory.hh" +#include "dev/io_device.hh" #include "sim/host.hh" #include "dev/tsunami_io.hh" @@ -70,7 +70,7 @@ class SimpleDisk; * primarily used doing boot before the kernel has loaded its device * drivers. */ -class AlphaConsole : public FunctionalMemory +class AlphaConsole : public PioDevice { protected: union { @@ -89,10 +89,10 @@ class AlphaConsole : public FunctionalMemory public: /** Standard Constructor */ - AlphaConsole(const std::string &name, SimConsole *cons, - SimpleDisk *d, System *system, BaseCPU *cpu, - TsunamiIO *clock, int num_cpus, - Addr a, MemoryController *mmu); + AlphaConsole(const std::string &name, SimConsole *cons, SimpleDisk *d, + System *system, BaseCPU *cpu, TsunamiIO *clock, + int num_cpus, MemoryController *mmu, Addr addr, + HierParams *hier, Bus *bus); /** * memory mapped reads and writes @@ -105,6 +105,9 @@ class AlphaConsole : public FunctionalMemory */ virtual void serialize(std::ostream &os); virtual void unserialize(Checkpoint *cp, const std::string §ion); + + public: + Tick cacheAccess(MemReqPtr &req); }; #endif // __ALPHA_CONSOLE_HH__ diff --git a/dev/etherdump.cc b/dev/etherdump.cc index 6d86adc32..b6d6bbe30 100644 --- a/dev/etherdump.cc +++ b/dev/etherdump.cc @@ -34,6 +34,7 @@ #include <string> +#include "base/misc.hh" #include "dev/etherdump.hh" #include "sim/builder.hh" #include "sim/universe.hh" @@ -43,11 +44,8 @@ using std::string; EtherDump::EtherDump(const string &name, const string &file) : SimObject(name) { - if (!file.empty()) { + if (!file.empty()) stream.open(file.c_str()); - if (stream.is_open()) - init(); - } } #define DLT_EN10MB 1 // Ethernet (10Mb) @@ -66,7 +64,8 @@ struct pcap_file_header { }; struct pcap_pkthdr { - struct timeval ts; // time stamp + uint32_t seconds; + uint32_t microseconds; uint32_t caplen; // length of portion present uint32_t len; // length this packet (off wire) }; @@ -74,6 +73,9 @@ struct pcap_pkthdr { void EtherDump::init() { + if (!stream.is_open()) + return; + curtime = time(NULL); s_freq = ticksPerSecond; us_freq = ticksPerSecond / ULL(1000000); @@ -96,8 +98,8 @@ EtherDump::init() * to sim_cycles. */ pcap_pkthdr pkthdr; - pkthdr.ts.tv_sec = curtime; - pkthdr.ts.tv_usec = 0; + pkthdr.seconds = curtime; + pkthdr.microseconds = 0; pkthdr.caplen = 0; pkthdr.len = 0; stream.write(reinterpret_cast<char *>(&pkthdr), sizeof(pkthdr)); @@ -109,8 +111,8 @@ void EtherDump::dumpPacket(PacketPtr &packet) { pcap_pkthdr pkthdr; - pkthdr.ts.tv_sec = curtime + (curTick / s_freq); - pkthdr.ts.tv_usec = (curTick / us_freq) % ULL(1000000); + pkthdr.seconds = curtime + (curTick / s_freq); + pkthdr.microseconds = (curTick / us_freq) % ULL(1000000); pkthdr.caplen = packet->length; pkthdr.len = packet->length; stream.write(reinterpret_cast<char *>(&pkthdr), sizeof(pkthdr)); diff --git a/dev/etherlink.cc b/dev/etherlink.cc index 676b1da1c..25991f1a7 100644 --- a/dev/etherlink.cc +++ b/dev/etherlink.cc @@ -42,17 +42,19 @@ #include "dev/etherpkt.hh" #include "sim/builder.hh" #include "sim/universe.hh" +#include "sim/system.hh" using namespace std; -EtherLink::EtherLink(const std::string &name, EtherInt *i1, EtherInt *i2, - Tick speed, EtherDump *dump) +EtherLink::EtherLink(const string &name, EtherInt *i1, EtherInt *i2, + Tick speed, Tick dly, EtherDump *dump) : SimObject(name) { double rate = ((double)ticksPerSecond * 8.0) / (double)speed; + Tick delay = US2Ticks(dly); - link1 = new Link(name + ".link1", rate, dump); - link2 = new Link(name + ".link2", rate, dump); + link1 = new Link(name + ".link1", rate, delay, dump); + link2 = new Link(name + ".link2", rate, delay, dump); int1 = new Interface(name + ".int1", link1, link2); int2 = new Interface(name + ".int2", link2, link1); @@ -72,28 +74,76 @@ EtherLink::~EtherLink() delete int2; } -EtherLink::Interface::Interface(const std::string &name, Link *tx, Link *rx) +EtherLink::Interface::Interface(const string &name, Link *tx, Link *rx) : EtherInt(name), txlink(tx) { tx->setTxInt(this); rx->setRxInt(this); } -EtherLink::Link::Link(const std::string &name, double rate, EtherDump *d) - : objName(name), txint(NULL), rxint(NULL), ticks_per_byte(rate), - dump(d), event(&mainEventQueue, this) +EtherLink::Link::Link(const string &name, double rate, Tick delay, + EtherDump *d) + : objName(name), txint(NULL), rxint(NULL), ticksPerByte(rate), + linkDelay(delay), dump(d), doneEvent(this) {} void +EtherLink::serialize(ostream &os) +{ + nameOut(os, name() + ".link1"); + link1->serialize(os); + nameOut(os, name() + ".link2"); + link2->serialize(os); +} + +void +EtherLink::unserialize(Checkpoint *cp, const string §ion) +{ + link1->unserialize(cp, section + ".link1"); + link2->unserialize(cp, section + ".link2"); +} + +void +EtherLink::Link::txComplete(PacketPtr &packet) +{ + DPRINTF(Ethernet, "packet received: len=%d\n", packet->length); + DDUMP(EthernetData, packet->data, packet->length); + rxint->sendPacket(packet); +} + +class LinkDelayEvent : public Event +{ + protected: + EtherLink::Link *link; + PacketPtr packet; + + // non-scheduling version for createForUnserialize() + LinkDelayEvent(EtherLink::Link *link); + + public: + LinkDelayEvent(EtherLink::Link *link, PacketPtr &pkt, Tick when); + + void process(); + + virtual void serialize(ostream &os); + virtual void unserialize(Checkpoint *cp, const string §ion); + static Serializable *createForUnserialize(Checkpoint *cp, + const string §ion); +}; + + +void EtherLink::Link::txDone() { if (dump) dump->dump(packet); - DPRINTF(Ethernet, "EtherLink packet received: len=%d\n", packet->length); - DDUMP(EthernetData, packet->data, packet->length); - - rxint->sendPacket(packet); + if (linkDelay > 0) { + DPRINTF(Ethernet, "packet delayed: delay=%d\n", linkDelay); + new LinkDelayEvent(this, packet, curTick + linkDelay); + } else { + txComplete(packet); + } packet = 0; assert(!busy()); @@ -105,27 +155,118 @@ bool EtherLink::Link::transmit(PacketPtr &pkt) { if (busy()) { - DPRINTF(Ethernet, "EtherLink packet not sent, link busy\n"); + DPRINTF(Ethernet, "packet not sent, link busy\n"); return false; } - DPRINTF(Ethernet, "EtherLink packet sent: len=%d\n", pkt->length); + DPRINTF(Ethernet, "packet sent: len=%d\n", pkt->length); DDUMP(EthernetData, pkt->data, pkt->length); packet = pkt; - int delay = (int)ceil(((double)pkt->length * ticks_per_byte) + 1.0); - DPRINTF(Ethernet, "EtherLink scheduling packet: delay=%d, (rate=%f)\n", - delay, ticks_per_byte); - event.schedule(curTick + delay); + Tick delay = (Tick)ceil(((double)pkt->length * ticksPerByte) + 1.0); + DPRINTF(Ethernet, "scheduling packet: delay=%d, (rate=%f)\n", + delay, ticksPerByte); + doneEvent.schedule(curTick + delay); return true; } +void +EtherLink::Link::serialize(ostream &os) +{ + bool packet_exists = packet; + SERIALIZE_SCALAR(packet_exists); + + bool event_scheduled = doneEvent.scheduled(); + SERIALIZE_SCALAR(event_scheduled); + if (event_scheduled) { + Tick event_time = doneEvent.when(); + SERIALIZE_SCALAR(event_time); + } + + if (packet_exists) { + nameOut(os, csprintf("%s.packet", name())); + packet->serialize(os); + } +} + +void +EtherLink::Link::unserialize(Checkpoint *cp, const string §ion) +{ + bool packet_exists; + UNSERIALIZE_SCALAR(packet_exists); + if (packet_exists) { + packet = new EtherPacket; + packet->unserialize(cp, csprintf("%s.packet", section)); + } + + bool event_scheduled; + UNSERIALIZE_SCALAR(event_scheduled); + if (event_scheduled) { + Tick event_time; + UNSERIALIZE_SCALAR(event_time); + doneEvent.schedule(event_time); + } +} + +LinkDelayEvent::LinkDelayEvent(EtherLink::Link *l) + : Event(&mainEventQueue), link(l) +{ + setFlags(AutoSerialize); + setFlags(AutoDelete); +} + +LinkDelayEvent::LinkDelayEvent(EtherLink::Link *l, PacketPtr &p, Tick when) + : Event(&mainEventQueue), link(l), packet(p) +{ + setFlags(AutoSerialize); + setFlags(AutoDelete); + schedule(when); +} + +void +LinkDelayEvent::process() +{ + link->txComplete(packet); +} + +void +LinkDelayEvent::serialize(ostream &os) +{ + paramOut(os, "type", string("LinkDelayEvent")); + Event::serialize(os); + SERIALIZE_OBJPTR(link); + + nameOut(os, csprintf("%s.packet", name())); + packet->serialize(os); +} + + +void +LinkDelayEvent::unserialize(Checkpoint *cp, const string §ion) +{ + Event::unserialize(cp, section); + packet = new EtherPacket; + packet->unserialize(cp, csprintf("%s.packet", section)); +} + + +Serializable * +LinkDelayEvent::createForUnserialize(Checkpoint *cp, const string §ion) +{ + EtherLink::Link *link; + UNSERIALIZE_OBJPTR(link); + return new LinkDelayEvent(link); +} + +REGISTER_SERIALIZEABLE("LinkDelayEvent", LinkDelayEvent) + BEGIN_DECLARE_SIM_OBJECT_PARAMS(EtherLink) SimObjectParam<EtherInt *> interface1; SimObjectParam<EtherInt *> interface2; Param<Tick> link_speed; + Param<Tick> link_delay; SimObjectParam<EtherDump *> packet_dump; END_DECLARE_SIM_OBJECT_PARAMS(EtherLink) @@ -135,6 +276,7 @@ BEGIN_INIT_SIM_OBJECT_PARAMS(EtherLink) INIT_PARAM(interface1, "interface 1"), INIT_PARAM(interface2, "interface 2"), INIT_PARAM_DFLT(link_speed, "link speed in bits per second", 100000000), + INIT_PARAM_DFLT(link_delay, "transmit delay of packets in us", 0), INIT_PARAM_DFLT(packet_dump, "object to dump network packets to", NULL) END_INIT_SIM_OBJECT_PARAMS(EtherLink) @@ -142,7 +284,7 @@ END_INIT_SIM_OBJECT_PARAMS(EtherLink) CREATE_SIM_OBJECT(EtherLink) { return new EtherLink(getInstanceName(), interface1, interface2, link_speed, - packet_dump); + link_delay, packet_dump); } REGISTER_SIM_OBJECT("EtherLink", EtherLink) diff --git a/dev/etherlink.hh b/dev/etherlink.hh index e1a7957ee..3b1dd21bc 100644 --- a/dev/etherlink.hh +++ b/dev/etherlink.hh @@ -49,6 +49,7 @@ class EtherLink : public SimObject protected: class Interface; + friend class LinkDelayEvent; /* * Model for a single uni-directional link */ @@ -59,34 +60,26 @@ class EtherLink : public SimObject Interface *txint; Interface *rxint; - double ticks_per_byte; + double ticksPerByte; + Tick linkDelay; EtherDump *dump; protected: /* * Transfer is complete */ - class DoneEvent : public Event - { - protected: - Link *link; - - public: - DoneEvent(EventQueue *q, Link *l) - : Event(q), link(l) {} - virtual void process() { link->txDone(); } - virtual const char *description() - { return "ethernet link completion"; } - }; - - friend class DoneEvent; - DoneEvent event; PacketPtr packet; - void txDone(); + typedef EventWrapper<Link, &Link::txDone> DoneEvent; + friend class DoneEvent; + DoneEvent doneEvent; + + friend class LinkDelayEvent; + void txComplete(PacketPtr &packet); public: - Link(const std::string &name, double rate, EtherDump *dump); + Link(const std::string &name, double rate, Tick delay, + EtherDump *dump); ~Link() {} virtual const std::string name() const { return objName; } @@ -96,6 +89,9 @@ class EtherLink : public SimObject void setTxInt(Interface *i) { assert(!txint); txint = i; } void setRxInt(Interface *i) { assert(!rxint); rxint = i; } + + virtual void serialize(std::ostream &os); + virtual void unserialize(Checkpoint *cp, const std::string §ion); }; /* @@ -120,8 +116,12 @@ class EtherLink : public SimObject public: EtherLink(const std::string &name, EtherInt *i1, EtherInt *i2, - Tick speed, EtherDump *dump); + Tick speed, Tick delay, EtherDump *dump); virtual ~EtherLink(); + + virtual void serialize(std::ostream &os); + virtual void unserialize(Checkpoint *cp, const std::string §ion); + }; #endif // __ETHERLINK_HH__ diff --git a/dev/etherpkt.cc b/dev/etherpkt.cc new file mode 100644 index 000000000..cb6087c89 --- /dev/null +++ b/dev/etherpkt.cc @@ -0,0 +1,50 @@ +/* + * Copyright (c) 2004 The Regents of The University of Michigan + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions are + * met: redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer; + * redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution; + * neither the name of the copyright holders nor the names of its + * contributors may be used to endorse or promote products derived from + * this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR + * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT + * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, + * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT + * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE + * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + */ + +#include <iostream> + +#include "dev/etherpkt.hh" +#include "sim/serialize.hh" + +using namespace std; + +void +EtherPacket::serialize(ostream &os) +{ + SERIALIZE_SCALAR(length); + SERIALIZE_ARRAY(data, length); +} + +void +EtherPacket::unserialize(Checkpoint *cp, const std::string §ion) +{ + UNSERIALIZE_SCALAR(length); + data = new uint8_t[length]; + UNSERIALIZE_ARRAY(data, length); +} + diff --git a/dev/etherpkt.hh b/dev/etherpkt.hh index 312d98f64..09516c427 100644 --- a/dev/etherpkt.hh +++ b/dev/etherpkt.hh @@ -33,6 +33,7 @@ #ifndef __ETHERPKT_HH__ #define __ETHERPKT_HH__ +#include <iosfwd> #include <memory> #include "sim/host.hh" diff --git a/dev/io_device.cc b/dev/io_device.cc new file mode 100644 index 000000000..4f53ba48d --- /dev/null +++ b/dev/io_device.cc @@ -0,0 +1,52 @@ +/* + * Copyright (c) 2003 The Regents of The University of Michigan + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions are + * met: redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer; + * redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution; + * neither the name of the copyright holders nor the names of its + * contributors may be used to endorse or promote products derived from + * this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR + * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT + * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, + * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT + * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE + * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + */ + +#include "dev/io_device.hh" +#include "mem/bus/base_interface.hh" +#include "mem/bus/dma_interface.hh" + +PioDevice::PioDevice(const std::string &name) + : FunctionalMemory(name), pioInterface(NULL) +{} + +PioDevice::~PioDevice() +{ + if (pioInterface) + delete pioInterface; +} + +DmaDevice::DmaDevice(const std::string &name) + : PioDevice(name), dmaInterface(NULL) +{} + +DmaDevice::~DmaDevice() +{ + if (dmaInterface) + delete dmaInterface; +} + diff --git a/dev/io_device.hh b/dev/io_device.hh new file mode 100644 index 000000000..9300d87e7 --- /dev/null +++ b/dev/io_device.hh @@ -0,0 +1,59 @@ +/* + * Copyright (c) 2003 The Regents of The University of Michigan + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions are + * met: redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer; + * redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution; + * neither the name of the copyright holders nor the names of its + * contributors may be used to endorse or promote products derived from + * this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR + * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT + * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, + * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT + * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE + * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + */ + +#ifndef __IO_DEVICE_HH__ +#define __IO_DEVICE_HH__ + +#include "mem/functional_mem/functional_memory.hh" + +class BaseInterface; +class Bus; +class HierParams; +template <class Bus> class DMAInterface; + +class PioDevice : public FunctionalMemory +{ + protected: + BaseInterface *pioInterface; + + public: + PioDevice(const std::string &name); + virtual ~PioDevice(); +}; + +class DmaDevice : public PioDevice +{ + protected: + DMAInterface<Bus> *dmaInterface; + + public: + DmaDevice(const std::string &name); + virtual ~DmaDevice(); +}; + +#endif // __IO_DEVICE_HH__ diff --git a/dev/pciconfigall.cc b/dev/pciconfigall.cc index 63943c7be..4467ce1e5 100644 --- a/dev/pciconfigall.cc +++ b/dev/pciconfigall.cc @@ -47,7 +47,7 @@ using namespace std; -PCIConfigAll::PCIConfigAll(const string &name, Tsunami *t, Addr a, +PciConfigAll::PciConfigAll(const string &name, Tsunami *t, Addr a, MemoryController *mmu) : FunctionalMemory(name), addr(a), tsunami(t) { @@ -63,9 +63,9 @@ PCIConfigAll::PCIConfigAll(const string &name, Tsunami *t, Addr a, } Fault -PCIConfigAll::read(MemReqPtr &req, uint8_t *data) +PciConfigAll::read(MemReqPtr &req, uint8_t *data) { - DPRINTF(PCIConfigAll, "read va=%#x size=%d\n", + DPRINTF(PciConfigAll, "read va=%#x size=%d\n", req->vaddr, req->size); Addr daddr = (req->paddr - (addr & PA_IMPL_MASK)); @@ -110,7 +110,7 @@ PCIConfigAll::read(MemReqPtr &req, uint8_t *data) } Fault -PCIConfigAll::write(MemReqPtr &req, const uint8_t *data) +PciConfigAll::write(MemReqPtr &req, const uint8_t *data) { Addr daddr = (req->paddr - (addr & PA_IMPL_MASK)); @@ -142,7 +142,7 @@ PCIConfigAll::write(MemReqPtr &req, const uint8_t *data) } } - DPRINTF(PCIConfigAll, "write - va=%#x size=%d data=%#x\n", + DPRINTF(PciConfigAll, "write - va=%#x size=%d data=%#x\n", req->vaddr, req->size, word_value); devices[device][func]->WriteConfig(reg, req->size, word_value); @@ -151,42 +151,42 @@ PCIConfigAll::write(MemReqPtr &req, const uint8_t *data) } void -PCIConfigAll::serialize(std::ostream &os) +PciConfigAll::serialize(std::ostream &os) { // code should be written } void -PCIConfigAll::unserialize(Checkpoint *cp, const std::string §ion) +PciConfigAll::unserialize(Checkpoint *cp, const std::string §ion) { //code should be written } #ifndef DOXYGEN_SHOULD_SKIP_THIS -BEGIN_DECLARE_SIM_OBJECT_PARAMS(PCIConfigAll) +BEGIN_DECLARE_SIM_OBJECT_PARAMS(PciConfigAll) SimObjectParam<Tsunami *> tsunami; SimObjectParam<MemoryController *> mmu; Param<Addr> addr; Param<Addr> mask; -END_DECLARE_SIM_OBJECT_PARAMS(PCIConfigAll) +END_DECLARE_SIM_OBJECT_PARAMS(PciConfigAll) -BEGIN_INIT_SIM_OBJECT_PARAMS(PCIConfigAll) +BEGIN_INIT_SIM_OBJECT_PARAMS(PciConfigAll) INIT_PARAM(tsunami, "Tsunami"), INIT_PARAM(mmu, "Memory Controller"), INIT_PARAM(addr, "Device Address"), INIT_PARAM(mask, "Address Mask") -END_INIT_SIM_OBJECT_PARAMS(PCIConfigAll) +END_INIT_SIM_OBJECT_PARAMS(PciConfigAll) -CREATE_SIM_OBJECT(PCIConfigAll) +CREATE_SIM_OBJECT(PciConfigAll) { - return new PCIConfigAll(getInstanceName(), tsunami, addr, mmu); + return new PciConfigAll(getInstanceName(), tsunami, addr, mmu); } -REGISTER_SIM_OBJECT("PCIConfigAll", PCIConfigAll) +REGISTER_SIM_OBJECT("PciConfigAll", PciConfigAll) #endif // DOXYGEN_SHOULD_SKIP_THIS diff --git a/dev/pciconfigall.hh b/dev/pciconfigall.hh index 95a171c53..e0f7f6ada 100644 --- a/dev/pciconfigall.hh +++ b/dev/pciconfigall.hh @@ -54,7 +54,7 @@ class PciDev; * space and passes the requests on to TsunamiPCIDev devices as * appropriate. */ -class PCIConfigAll : public FunctionalMemory +class PciConfigAll : public FunctionalMemory { private: Addr addr; @@ -79,7 +79,7 @@ class PCIConfigAll : public FunctionalMemory /** * The default constructor. */ - PCIConfigAll(const std::string &name, Tsunami *t, Addr a, + PciConfigAll(const std::string &name, Tsunami *t, Addr a, MemoryController *mmu); virtual Fault read(MemReqPtr &req, uint8_t *data); diff --git a/dev/pcidev.cc b/dev/pcidev.cc index 1706bdd5a..0e0b7f840 100644 --- a/dev/pcidev.cc +++ b/dev/pcidev.cc @@ -51,7 +51,7 @@ using namespace std; -PciDev::PciDev(const string &name, MemoryController *mmu, PCIConfigAll *cf, +PciDev::PciDev(const string &name, MemoryController *mmu, PciConfigAll *cf, PciConfigData *cd, uint32_t bus, uint32_t dev, uint32_t func) : FunctionalMemory(name), MMU(mmu), ConfigSpace(cf), ConfigData(cd), Bus(bus), Device(dev), Function(func) diff --git a/dev/pcidev.hh b/dev/pcidev.hh index dcd3d1b8a..6496791b2 100644 --- a/dev/pcidev.hh +++ b/dev/pcidev.hh @@ -37,7 +37,7 @@ #include "sim/sim_object.hh" #include "mem/functional_mem/functional_memory.hh" -class PCIConfigAll; +class PciConfigAll; class MemoryController; class PciConfigData : public SimObject @@ -67,7 +67,7 @@ class PciDev : public FunctionalMemory { protected: MemoryController *MMU; - PCIConfigAll *ConfigSpace; + PciConfigAll *ConfigSpace; PciConfigData *ConfigData; uint32_t Bus; uint32_t Device; @@ -78,7 +78,7 @@ class PciDev : public FunctionalMemory Addr BARAddrs[6]; public: - PciDev(const std::string &name, MemoryController *mmu, PCIConfigAll *cf, + PciDev(const std::string &name, MemoryController *mmu, PciConfigAll *cf, PciConfigData *cd, uint32_t bus, uint32_t dev, uint32_t func); virtual Fault read(MemReqPtr &req, uint8_t *data) { diff --git a/dev/tsunami.hh b/dev/tsunami.hh index ef27ff18e..bcbd9c756 100644 --- a/dev/tsunami.hh +++ b/dev/tsunami.hh @@ -43,7 +43,7 @@ class EtherDev; class TsunamiCChip; class TsunamiPChip; class TsunamiIO; -class PCIConfigAll; +class PciConfigAll; class System; /** @@ -85,7 +85,7 @@ class Tsunami : public Platform * The config space in Tsunami all needs to return * -1 if a device is not there. */ - PCIConfigAll *pciconfig; + PciConfigAll *pciconfig; int intr_sum_type[Tsunami::Max_CPUs]; int ipi_pending[Tsunami::Max_CPUs]; |