diff options
Diffstat (limited to 'objects/BaseCPU.mpy')
| -rw-r--r-- | objects/BaseCPU.mpy | 28 |
1 files changed, 7 insertions, 21 deletions
diff --git a/objects/BaseCPU.mpy b/objects/BaseCPU.mpy index f6e6ff96c..484fcccd6 100644 --- a/objects/BaseCPU.mpy +++ b/objects/BaseCPU.mpy @@ -4,11 +4,13 @@ simobj BaseCPU(SimObject): icache = Param.BaseMem(NULL, "L1 instruction cache object") dcache = Param.BaseMem(NULL, "L1 data cache object") - dtb = Param.AlphaDTB("Data TLB") - itb = Param.AlphaITB("Instruction TLB") - mem = Param.FunctionalMemory("memory") - system = Param.BaseSystem(Super, "system object") - workload = VectorParam.Process("processes to run") + if Bool._convert(env.get('FULL_SYSTEM', 'False')): + dtb = Param.AlphaDTB("Data TLB") + itb = Param.AlphaITB("Instruction TLB") + mem = Param.FunctionalMemory("memory") + system = Param.BaseSystem(Super, "system object") + else: + workload = VectorParam.Process("processes to run") max_insts_all_threads = Param.Counter(0, "terminate when all threads have reached this inst count") @@ -21,19 +23,3 @@ simobj BaseCPU(SimObject): defer_registration = Param.Bool(False, "defer registration with system (for sampling)") - - def check(self): - has_workload = self._hasvalue('workload') - has_dtb = self._hasvalue('dtb') - has_itb = self._hasvalue('itb') - has_mem = self._hasvalue('mem') - has_system = self._hasvalue('system') - - if has_workload: - self.dtb.disable = True - self.itb.disable = True - self.mem.disable = True - self.system.disable = True - - if has_dtb or has_itb or has_mem or has_system: - self.workload.disable = True |