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Diffstat (limited to 'python/m5/objects/BaseCPU.py')
-rw-r--r-- | python/m5/objects/BaseCPU.py | 4 |
1 files changed, 1 insertions, 3 deletions
diff --git a/python/m5/objects/BaseCPU.py b/python/m5/objects/BaseCPU.py index a90203729..49cb2a8f3 100644 --- a/python/m5/objects/BaseCPU.py +++ b/python/m5/objects/BaseCPU.py @@ -2,13 +2,11 @@ from m5 import * class BaseCPU(SimObject): type = 'BaseCPU' abstract = True - icache = Param.BaseMem(NULL, "L1 instruction cache object") - dcache = Param.BaseMem(NULL, "L1 data cache object") + mem = Param.MemObject("memory") if build_env['FULL_SYSTEM']: dtb = Param.AlphaDTB("Data TLB") itb = Param.AlphaITB("Instruction TLB") - mem = Param.FunctionalMemory("memory") system = Param.System(Parent.any, "system object") cpu_id = Param.Int(-1, "CPU identifier") else: |