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-rw-r--r--python/m5/objects/Pci.py12
1 files changed, 6 insertions, 6 deletions
diff --git a/python/m5/objects/Pci.py b/python/m5/objects/Pci.py
index defdd10a3..4124d0b92 100644
--- a/python/m5/objects/Pci.py
+++ b/python/m5/objects/Pci.py
@@ -22,12 +22,12 @@ class PciConfigData(SimObject):
BAR3 = Param.UInt32(0x00, "Base Address Register 3")
BAR4 = Param.UInt32(0x00, "Base Address Register 4")
BAR5 = Param.UInt32(0x00, "Base Address Register 5")
- BAR0Size = Param.UInt32(0, "Base Address Register 0 Size")
- BAR1Size = Param.UInt32(0, "Base Address Register 1 Size")
- BAR2Size = Param.UInt32(0, "Base Address Register 2 Size")
- BAR3Size = Param.UInt32(0, "Base Address Register 3 Size")
- BAR4Size = Param.UInt32(0, "Base Address Register 4 Size")
- BAR5Size = Param.UInt32(0, "Base Address Register 5 Size")
+ BAR0Size = Param.MemorySize32('0B', "Base Address Register 0 Size")
+ BAR1Size = Param.MemorySize32('0B', "Base Address Register 1 Size")
+ BAR2Size = Param.MemorySize32('0B', "Base Address Register 2 Size")
+ BAR3Size = Param.MemorySize32('0B', "Base Address Register 3 Size")
+ BAR4Size = Param.MemorySize32('0B', "Base Address Register 4 Size")
+ BAR5Size = Param.MemorySize32('0B', "Base Address Register 5 Size")
CardbusCIS = Param.UInt32(0x00, "Cardbus Card Information Structure")
SubsystemID = Param.UInt16(0x00, "Subsystem ID")