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-rw-r--r--python/m5/objects/BaseCPU.mpy2
-rw-r--r--python/m5/objects/Pci.mpy5
2 files changed, 3 insertions, 4 deletions
diff --git a/python/m5/objects/BaseCPU.mpy b/python/m5/objects/BaseCPU.mpy
index be93e8ad1..5d8305d88 100644
--- a/python/m5/objects/BaseCPU.mpy
+++ b/python/m5/objects/BaseCPU.mpy
@@ -4,7 +4,7 @@ simobj BaseCPU(SimObject):
icache = Param.BaseMem(NULL, "L1 instruction cache object")
dcache = Param.BaseMem(NULL, "L1 data cache object")
- if env.get('FULL_SYSTEM', 'False'):
+ if build_env['FULL_SYSTEM']:
dtb = Param.AlphaDTB("Data TLB")
itb = Param.AlphaITB("Instruction TLB")
mem = Param.FunctionalMemory("memory")
diff --git a/python/m5/objects/Pci.mpy b/python/m5/objects/Pci.mpy
index caa3c52ff..f7c6674f7 100644
--- a/python/m5/objects/Pci.mpy
+++ b/python/m5/objects/Pci.mpy
@@ -1,8 +1,7 @@
from Device import FooPioDevice, DmaDevice
-simobj PciConfigData(FooPioDevice):
+simobj PciConfigData(SimObject):
type = 'PciConfigData'
- addr = 0xffffffffffffffffL
VendorID = Param.UInt16("Vendor ID")
DeviceID = Param.UInt16("Device ID")
Command = Param.UInt16(0, "Command")
@@ -44,9 +43,9 @@ simobj PciConfigAll(FooPioDevice):
simobj PciDevice(DmaDevice):
type = 'PciDevice'
abstract = True
+ addr = 0xffffffffL
pci_bus = Param.Int("PCI bus")
pci_dev = Param.Int("PCI device number")
pci_func = Param.Int("PCI function code")
configdata = Param.PciConfigData(Super, "PCI Config data")
configspace = Param.PciConfigAll(Super, "PCI Configspace")
- addr = 0xffffffffffffffffL