diff options
Diffstat (limited to 'python')
| -rw-r--r-- | python/m5/objects/BaseCPU.py | 2 | ||||
| -rw-r--r-- | python/m5/objects/Bus.py | 7 | ||||
| -rw-r--r-- | python/m5/objects/PhysicalMemory.py | 1 |
3 files changed, 5 insertions, 5 deletions
diff --git a/python/m5/objects/BaseCPU.py b/python/m5/objects/BaseCPU.py index 07cb850f1..fccddb1ec 100644 --- a/python/m5/objects/BaseCPU.py +++ b/python/m5/objects/BaseCPU.py @@ -9,7 +9,7 @@ class BaseCPU(SimObject): system = Param.System(Parent.any, "system object") cpu_id = Param.Int(-1, "CPU identifier") else: - mem = Param.Memory(Parent.any, "memory") + mem = Param.MemObject("memory") workload = VectorParam.Process("processes to run") max_insts_all_threads = Param.Counter(0, diff --git a/python/m5/objects/Bus.py b/python/m5/objects/Bus.py index 26509d7d2..8c5397281 100644 --- a/python/m5/objects/Bus.py +++ b/python/m5/objects/Bus.py @@ -1,7 +1,6 @@ from m5 import * -from BaseHier import BaseHier +from MemObject import MemObject -class Bus(BaseHier): +class Bus(MemObject): type = 'Bus' - clock = Param.Clock("bus frequency") - width = Param.Int("bus width in bytes") + bus_id = Param.Int(0, "blah") diff --git a/python/m5/objects/PhysicalMemory.py b/python/m5/objects/PhysicalMemory.py index b0aba1a7d..7c5a0c517 100644 --- a/python/m5/objects/PhysicalMemory.py +++ b/python/m5/objects/PhysicalMemory.py @@ -5,5 +5,6 @@ class PhysicalMemory(Memory): type = 'PhysicalMemory' range = Param.AddrRange("Device Address") file = Param.String('', "memory mapped file") + bus = Param.MemObject("Bus to attach to") if build_env['FULL_SYSTEM']: mmu = Param.MemoryController(Parent.any, "Memory Controller") |