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-rw-r--r--sim/process.cc24
1 files changed, 7 insertions, 17 deletions
diff --git a/sim/process.cc b/sim/process.cc
index 7b27c4274..ce5833881 100644
--- a/sim/process.cc
+++ b/sim/process.cc
@@ -39,7 +39,7 @@
#include "config/full_system.hh"
#include "cpu/exec_context.hh"
#include "mem/page_table.hh"
-#include "mem/mem_object.hh"
+#include "mem/physical.hh"
#include "mem/translating_port.hh"
#include "sim/builder.hh"
#include "sim/process.hh"
@@ -153,21 +153,11 @@ Process::startup()
// mark this context as active so it will start ticking.
xc->activate(0);
- // Here we are grabbing the memory port of the CPU hosting the
- // initial execution context for initialization. In the long run
- // this is not what we want, since it means that all
- // initialization accesses (e.g., loading object file sections)
- // will be done a cache block at a time through the CPU's cache.
- // We really want something more like:
- //
- // memport = system->physmem->getPort();
- // myPort.setPeer(memport);
- // memport->setPeer(&myPort);
- // initVirtMem = new TranslatingPort(myPort, pTable);
- //
- // but we need our own dummy port "myPort" that doesn't exist.
- // In the short term it works just fine though.
- initVirtMem = xc->getMemPort();
+ Port *mem_port;
+ mem_port = system->physmem->getPort("functional");
+ initVirtMem = new TranslatingPort(pTable, true);
+ mem_port->setPeer(initVirtMem);
+ initVirtMem->setPeer(mem_port);
}
void
@@ -326,7 +316,7 @@ LiveProcess::argsInit(int intSize, int pageSize)
roundUp(stack_size, pageSize));
// map out initial stack contents
- Addr argv_array_base = stack_min + sizeof(uint64_t); // room for argc
+ Addr argv_array_base = stack_min + intSize; // room for argc
Addr envp_array_base = argv_array_base + argv_array_size;
Addr arg_data_base = envp_array_base + envp_array_size;
Addr env_data_base = arg_data_base + arg_data_size;