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-rw-r--r--sim/byteswap.hh1
-rw-r--r--sim/process.hh2
-rw-r--r--sim/syscall_emul.hh2
-rw-r--r--sim/vptr.hh10
4 files changed, 8 insertions, 7 deletions
diff --git a/sim/byteswap.hh b/sim/byteswap.hh
index 6a98a987f..c8e3694fe 100644
--- a/sim/byteswap.hh
+++ b/sim/byteswap.hh
@@ -79,7 +79,6 @@ static inline uint64_t swap_byte(uint64_t x) {return swap_byte64(x);}
static inline int64_t swap_byte(int64_t x) {return swap_byte64((uint64_t)x);}
static inline uint32_t swap_byte(uint32_t x) {return swap_byte32(x);}
static inline int32_t swap_byte(int32_t x) {return swap_byte32((uint32_t)x);}
-static inline int32_t swap_byte(long x) {return swap_byte32((long)x);}
static inline uint16_t swap_byte(uint16_t x) {return swap_byte32(x);}
static inline int16_t swap_byte(int16_t x) {return swap_byte16((uint16_t)x);}
static inline uint8_t swap_byte(uint8_t x) {return x;}
diff --git a/sim/process.hh b/sim/process.hh
index 2116ef632..43fafd9d7 100644
--- a/sim/process.hh
+++ b/sim/process.hh
@@ -40,7 +40,7 @@
#include <vector>
-#include "targetarch/isa_traits.hh"
+#include "arch/isa_traits.hh"
#include "sim/sim_object.hh"
#include "sim/stats.hh"
#include "base/statistics.hh"
diff --git a/sim/syscall_emul.hh b/sim/syscall_emul.hh
index f55709575..4e247ed55 100644
--- a/sim/syscall_emul.hh
+++ b/sim/syscall_emul.hh
@@ -47,7 +47,7 @@
#include "base/intmath.hh" // for RoundUp
#include "mem/functional/functional.hh"
-#include "targetarch/isa_traits.hh" // for Addr
+#include "arch/isa_traits.hh" // for Addr
#include "base/trace.hh"
#include "cpu/exec_context.hh"
diff --git a/sim/vptr.hh b/sim/vptr.hh
index d1bda4061..7ec43602d 100644
--- a/sim/vptr.hh
+++ b/sim/vptr.hh
@@ -29,7 +29,8 @@
#ifndef __ARCH_ALPHA_VPTR_HH__
#define __ARCH_ALPHA_VPTR_HH__
-#include "arch/alpha/vtophys.hh"
+#include "targetarch/vtophys.hh"
+#include "arch/isa_traits.hh"
class ExecContext;
@@ -69,15 +70,16 @@ class VPtr
const VPtr<T> &operator+=(int offset)
{
ptr += offset;
- assert((ptr & (AlphaISA::PageBytes - 1)) + sizeof(T)
- < AlphaISA::PageBytes);
+ assert((ptr & (TheISA::PageBytes - 1)) + sizeof(T)
+ < TheISA::PageBytes);
return *this;
}
const VPtr<T> &operator=(Addr p)
{
- assert((p & (AlphaISA::PageBytes)) + sizeof(T) < AlphaISA::PageBytes);
+ assert((p & (TheISA::PageBytes - 1)) + sizeof(T)
+ < TheISA::PageBytes);
ptr = p;
return *this;