summaryrefslogtreecommitdiff
path: root/src/arch/alpha/ev5.cc
diff options
context:
space:
mode:
Diffstat (limited to 'src/arch/alpha/ev5.cc')
-rw-r--r--src/arch/alpha/ev5.cc8
1 files changed, 4 insertions, 4 deletions
diff --git a/src/arch/alpha/ev5.cc b/src/arch/alpha/ev5.cc
index adbebb346..3bc0492b1 100644
--- a/src/arch/alpha/ev5.cc
+++ b/src/arch/alpha/ev5.cc
@@ -128,13 +128,13 @@ zeroRegisters(CPU *cpu)
}
int
-MiscRegFile::getInstAsid()
+ISA::getInstAsid()
{
return ITB_ASN_ASN(ipr[IPR_ITB_ASN]);
}
int
-MiscRegFile::getDataAsid()
+ISA::getDataAsid()
{
return DTB_ASN_ASN(ipr[IPR_DTB_ASN]);
}
@@ -158,7 +158,7 @@ initIPRs(ThreadContext *tc, int cpuId)
}
MiscReg
-MiscRegFile::readIpr(int idx, ThreadContext *tc)
+ISA::readIpr(int idx, ThreadContext *tc)
{
uint64_t retval = 0; // return value, default 0
@@ -270,7 +270,7 @@ int break_ipl = -1;
#endif
void
-MiscRegFile::setIpr(int idx, uint64_t val, ThreadContext *tc)
+ISA::setIpr(int idx, uint64_t val, ThreadContext *tc)
{
uint64_t old;