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-rw-r--r--src/arch/alpha/ev5.cc11
1 files changed, 0 insertions, 11 deletions
diff --git a/src/arch/alpha/ev5.cc b/src/arch/alpha/ev5.cc
index 676d7a713..29910caa6 100644
--- a/src/arch/alpha/ev5.cc
+++ b/src/arch/alpha/ev5.cc
@@ -80,17 +80,6 @@ initCPU(ThreadContext *tc, int cpuId)
delete reset;
}
-template <class CPU>
-void
-zeroRegisters(CPU *cpu)
-{
- // Insure ISA semantics
- // (no longer very clean due to the change in setIntReg() in the
- // cpu model. Consider changing later.)
- cpu->thread->setIntReg(ZeroReg, 0);
- cpu->thread->setFloatReg(ZeroReg, 0);
-}
-
////////////////////////////////////////////////////////////////////////
//
//