summaryrefslogtreecommitdiff
path: root/src/arch/alpha/faults.cc
diff options
context:
space:
mode:
Diffstat (limited to 'src/arch/alpha/faults.cc')
-rw-r--r--src/arch/alpha/faults.cc2
1 files changed, 1 insertions, 1 deletions
diff --git a/src/arch/alpha/faults.cc b/src/arch/alpha/faults.cc
index 2928f8d65..8bb781c13 100644
--- a/src/arch/alpha/faults.cc
+++ b/src/arch/alpha/faults.cc
@@ -147,7 +147,7 @@ DtbFault::invoke(ThreadContext *tc, const StaticInstPtr &inst)
// on VPTE loads (instead of locking the registers until IPR_VA is
// read, like the EV5). The EV6 approach is cleaner and seems to
// work with EV5 PAL code, but not the other way around.
- if (reqFlags.noneSet(Request::VPTE | Request::PREFETCH)) {
+ if (reqFlags.noneSet(AlphaRequestFlags::VPTE | Request::PREFETCH)) {
// set VA register with faulting address
tc->setMiscRegNoEffect(IPR_VA, vaddr);