diff options
Diffstat (limited to 'src/arch/alpha/isa/decoder.isa')
| -rw-r--r-- | src/arch/alpha/isa/decoder.isa | 16 |
1 files changed, 2 insertions, 14 deletions
diff --git a/src/arch/alpha/isa/decoder.isa b/src/arch/alpha/isa/decoder.isa index e2947cf4a..937b38fce 100644 --- a/src/arch/alpha/isa/decoder.isa +++ b/src/arch/alpha/isa/decoder.isa @@ -47,11 +47,6 @@ decode OPCODE default Unknown::unknown() { 0x23: ldt({{ Fa = Mem.df; }}); 0x2a: ldl_l({{ Ra.sl = Mem.sl; }}, mem_flags = LLSC); 0x2b: ldq_l({{ Ra.uq = Mem.uq; }}, mem_flags = LLSC); -#ifdef USE_COPY - 0x20: MiscPrefetch::copy_load({{ EA = Ra; }}, - {{ fault = xc->copySrcTranslate(EA); }}, - inst_flags = [IsMemRef, IsLoad, IsCopy]); -#endif } format LoadOrPrefetch { @@ -71,11 +66,6 @@ decode OPCODE default Unknown::unknown() { 0x0f: stq_u({{ Mem.uq = Ra.uq; }}, {{ EA = (Rb + disp) & ~7; }}); 0x26: sts({{ Mem.ul = t_to_s(Fa.uq); }}); 0x27: stt({{ Mem.df = Fa; }}); -#ifdef USE_COPY - 0x24: MiscPrefetch::copy_store({{ EA = Rb; }}, - {{ fault = xc->copy(EA); }}, - inst_flags = [IsMemRef, IsStore, IsCopy]); -#endif } format StoreCond { @@ -788,10 +778,8 @@ decode OPCODE default Unknown::unknown() { format MiscPrefetch { 0xf800: wh64({{ EA = Rb & ~ULL(63); }}, - {{ xc->writeHint(EA, 64, memAccessFlags); }}, - mem_flags = PREFETCH, - inst_flags = [IsMemRef, IsDataPrefetch, - IsStore, MemWriteOp]); + {{ ; }}, + mem_flags = PREFETCH); } format BasicOperate { |