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-rw-r--r--src/arch/alpha/isa/main.isa20
1 files changed, 10 insertions, 10 deletions
diff --git a/src/arch/alpha/isa/main.isa b/src/arch/alpha/isa/main.isa
index c03a99970..3d80ddf68 100644
--- a/src/arch/alpha/isa/main.isa
+++ b/src/arch/alpha/isa/main.isa
@@ -161,16 +161,16 @@ def bitfield HW_IPR_IDX <15:0>; // IPR index
def bitfield M5FUNC <7:0>;
def operand_types {{
- 'sb' : ('signed int', 8),
- 'ub' : ('unsigned int', 8),
- 'sw' : ('signed int', 16),
- 'uw' : ('unsigned int', 16),
- 'sl' : ('signed int', 32),
- 'ul' : ('unsigned int', 32),
- 'sq' : ('signed int', 64),
- 'uq' : ('unsigned int', 64),
- 'sf' : ('float', 32),
- 'df' : ('float', 64)
+ 'sb' : 'int8_t',
+ 'ub' : 'uint8_t',
+ 'sw' : 'int16_t',
+ 'uw' : 'uint16_t',
+ 'sl' : 'int32_t',
+ 'ul' : 'uint32_t',
+ 'sq' : 'int64_t',
+ 'uq' : 'uint64_t',
+ 'sf' : 'float',
+ 'df' : 'double'
}};
def operands {{