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Diffstat (limited to 'src/arch/alpha/isa/mem.isa')
| -rw-r--r-- | src/arch/alpha/isa/mem.isa | 1 |
1 files changed, 0 insertions, 1 deletions
diff --git a/src/arch/alpha/isa/mem.isa b/src/arch/alpha/isa/mem.isa index 08a0a2343..a5dda7fc6 100644 --- a/src/arch/alpha/isa/mem.isa +++ b/src/arch/alpha/isa/mem.isa @@ -668,7 +668,6 @@ def LoadStoreBase(name, Name, ea_code, memacc_code, mem_flags, inst_flags, + completeAccTemplate.subst(completeacc_iop)) }}; - def format LoadOrNop(memacc_code, ea_code = {{ EA = Rb + disp; }}, mem_flags = [], inst_flags = []) {{ (header_output, decoder_output, decode_block, exec_output) = \ |