diff options
Diffstat (limited to 'src/arch/alpha/isa/mem.isa')
| -rw-r--r-- | src/arch/alpha/isa/mem.isa | 24 |
1 files changed, 12 insertions, 12 deletions
diff --git a/src/arch/alpha/isa/mem.isa b/src/arch/alpha/isa/mem.isa index 73b04c573..71b134340 100644 --- a/src/arch/alpha/isa/mem.isa +++ b/src/arch/alpha/isa/mem.isa @@ -163,7 +163,7 @@ def template LoadStoreConstructor {{ }}; def template EACompExecute {{ - Fault %(class_name)s::eaComp(%(CPU_exec_context)s *xc, + Fault %(class_name)s::eaComp(CPU_EXEC_CONTEXT *xc, Trace::InstRecord *traceData) const { Addr EA; @@ -185,7 +185,7 @@ def template EACompExecute {{ def template LoadExecute {{ - Fault %(class_name)s::execute(%(CPU_exec_context)s *xc, + Fault %(class_name)s::execute(CPU_EXEC_CONTEXT *xc, Trace::InstRecord *traceData) const { Addr EA; @@ -211,7 +211,7 @@ def template LoadExecute {{ def template LoadInitiateAcc {{ - Fault %(class_name)s::initiateAcc(%(CPU_exec_context)s *xc, + Fault %(class_name)s::initiateAcc(CPU_EXEC_CONTEXT *xc, Trace::InstRecord *traceData) const { Addr EA; @@ -233,7 +233,7 @@ def template LoadInitiateAcc {{ def template LoadCompleteAcc {{ Fault %(class_name)s::completeAcc(PacketPtr pkt, - %(CPU_exec_context)s *xc, + CPU_EXEC_CONTEXT *xc, Trace::InstRecord *traceData) const { Fault fault = NoFault; @@ -257,7 +257,7 @@ def template LoadCompleteAcc {{ def template StoreExecute {{ - Fault %(class_name)s::execute(%(CPU_exec_context)s *xc, + Fault %(class_name)s::execute(CPU_EXEC_CONTEXT *xc, Trace::InstRecord *traceData) const { Addr EA; @@ -290,7 +290,7 @@ def template StoreExecute {{ }}; def template StoreCondExecute {{ - Fault %(class_name)s::execute(%(CPU_exec_context)s *xc, + Fault %(class_name)s::execute(CPU_EXEC_CONTEXT *xc, Trace::InstRecord *traceData) const { Addr EA; @@ -324,7 +324,7 @@ def template StoreCondExecute {{ }}; def template StoreInitiateAcc {{ - Fault %(class_name)s::initiateAcc(%(CPU_exec_context)s *xc, + Fault %(class_name)s::initiateAcc(CPU_EXEC_CONTEXT *xc, Trace::InstRecord *traceData) const { Addr EA; @@ -351,7 +351,7 @@ def template StoreInitiateAcc {{ def template StoreCompleteAcc {{ Fault %(class_name)s::completeAcc(PacketPtr pkt, - %(CPU_exec_context)s *xc, + CPU_EXEC_CONTEXT *xc, Trace::InstRecord *traceData) const { return NoFault; @@ -361,7 +361,7 @@ def template StoreCompleteAcc {{ def template StoreCondCompleteAcc {{ Fault %(class_name)s::completeAcc(PacketPtr pkt, - %(CPU_exec_context)s *xc, + CPU_EXEC_CONTEXT *xc, Trace::InstRecord *traceData) const { Fault fault = NoFault; @@ -385,7 +385,7 @@ def template StoreCondCompleteAcc {{ def template MiscExecute {{ - Fault %(class_name)s::execute(%(CPU_exec_context)s *xc, + Fault %(class_name)s::execute(CPU_EXEC_CONTEXT *xc, Trace::InstRecord *traceData) const { Addr EA M5_VAR_USED; @@ -408,7 +408,7 @@ def template MiscExecute {{ // Prefetches in Alpha don't actually do anything // They just build an effective address and complete def template MiscInitiateAcc {{ - Fault %(class_name)s::initiateAcc(%(CPU_exec_context)s *xc, + Fault %(class_name)s::initiateAcc(CPU_EXEC_CONTEXT *xc, Trace::InstRecord *traceData) const { warn("initiateAcc undefined: Misc instruction does not support split " @@ -420,7 +420,7 @@ def template MiscInitiateAcc {{ def template MiscCompleteAcc {{ Fault %(class_name)s::completeAcc(PacketPtr pkt, - %(CPU_exec_context)s *xc, + CPU_EXEC_CONTEXT *xc, Trace::InstRecord *traceData) const { warn("completeAcc undefined: Misc instruction does not support split " |