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-rw-r--r--src/arch/alpha/isa/mem.isa2
1 files changed, 1 insertions, 1 deletions
diff --git a/src/arch/alpha/isa/mem.isa b/src/arch/alpha/isa/mem.isa
index fedfbf55d..b1703221f 100644
--- a/src/arch/alpha/isa/mem.isa
+++ b/src/arch/alpha/isa/mem.isa
@@ -548,7 +548,7 @@ def format LoadOrPrefetch(memacc_code, ea_code = {{ EA = Rb + disp; }},
pf_flags = makeList(pf_flags)
inst_flags = makeList(inst_flags)
- pf_mem_flags = mem_flags + pf_flags + ['NO_FAULT']
+ pf_mem_flags = mem_flags + pf_flags + ['PREFETCH']
pf_inst_flags = inst_flags + ['IsMemRef', 'IsLoad',
'IsDataPrefetch', 'MemReadOp']