diff options
Diffstat (limited to 'src/arch/alpha/isa')
-rw-r--r-- | src/arch/alpha/isa/mem.isa | 39 |
1 files changed, 38 insertions, 1 deletions
diff --git a/src/arch/alpha/isa/mem.isa b/src/arch/alpha/isa/mem.isa index cd5e117ec..9a8503637 100644 --- a/src/arch/alpha/isa/mem.isa +++ b/src/arch/alpha/isa/mem.isa @@ -65,6 +65,8 @@ output header {{ const StaticInstPtr &eaCompInst() const { return eaCompPtr; } const StaticInstPtr &memAccInst() const { return memAccPtr; } + + Request::Flags memAccFlags() { return memAccessFlags; } }; /** @@ -176,6 +178,8 @@ def template LoadStoreDeclare {{ %(InitiateAccDeclare)s %(CompleteAccDeclare)s + + %(MemAccSizeDeclare)s }; }}; @@ -190,6 +194,25 @@ def template CompleteAccDeclare {{ Trace::InstRecord *) const; }}; +def template MemAccSizeDeclare {{ + int memAccSize(%(CPU_exec_context)s *xc); +}}; + +def template MiscMemAccSize {{ + int %(class_name)s::memAccSize(%(CPU_exec_context)s *xc) + { + panic("Misc instruction does not support split access method!"); + return 0; + } +}}; + +def template LoadStoreMemAccSize {{ + int %(class_name)s::memAccSize(%(CPU_exec_context)s *xc) + { + // Return the memory access size in bytes + return (%(mem_acc_size)d / 8); + } +}}; def template EACompConstructor {{ /** TODO: change op_class to AddrGenOp or something (requires @@ -620,6 +643,14 @@ def template MiscCompleteAcc {{ } }}; +def template MiscMemAccSize {{ + int %(class_name)s::memAccSize(%(CPU_exec_context)s *xc) + { + panic("Misc instruction does not support split access method!"); + return 0; + } +}}; + // load instructions use Ra as dest, so check for // Ra == 31 to detect nops def template LoadNopCheckDecode {{ @@ -693,6 +724,11 @@ def LoadStoreBase(name, Name, ea_code, memacc_code, mem_flags, inst_flags, initiateAccTemplate = eval(exec_template_base + 'InitiateAcc') completeAccTemplate = eval(exec_template_base + 'CompleteAcc') + if (exec_template_base == 'Load' or exec_template_base == 'Store'): + memAccSizeTemplate = eval('LoadStoreMemAccSize') + else: + memAccSizeTemplate = eval('MiscMemAccSize') + # (header_output, decoder_output, decode_block, exec_output) return (LoadStoreDeclare.subst(iop), EACompConstructor.subst(ea_iop) @@ -703,7 +739,8 @@ def LoadStoreBase(name, Name, ea_code, memacc_code, mem_flags, inst_flags, + memAccExecTemplate.subst(memacc_iop) + fullExecTemplate.subst(iop) + initiateAccTemplate.subst(iop) - + completeAccTemplate.subst(iop)) + + completeAccTemplate.subst(iop) + + memAccSizeTemplate.subst(memacc_iop)) }}; def format LoadOrNop(memacc_code, ea_code = {{ EA = Rb + disp; }}, |