3 files changed, 39 insertions, 41 deletions

diff --git a/src/arch/alpha/isa/decoder.isa b/src/arch/alpha/isa/decoder.isa
index 106290784..4bbf83cce 100644
--- a/src/arch/alpha/isa/decoder.isa
+++ b/src/arch/alpha/isa/decoder.isa
@@ -202,8 +202,8 @@ decode OPCODE default Unknown::unknown() {
             0x6c: decode RA {
                 31: decode IMM {
                     1: decode INTIMM {
-                        // return EV5 for FULL_SYSTEM and EV6 otherwise
-                        1: implver({{ Rc = FULL_SYSTEM ? 1 : 2 }});
+                        // return EV5 for FullSystem and EV6 otherwise
+                        1: implver({{ Rc = FullSystem ? 1 : 2 }});
                     }
                 }
             }
@@ -780,7 +780,7 @@ decode OPCODE default Unknown::unknown() {
                  * the parser to understand that.
                  */
                 uint64_t unused_var M5_VAR_USED = Rb;
-                Ra = FULL_SYSTEM ? xc->readMiscReg(IPR_CC) : curTick();
+                Ra = FullSystem ? xc->readMiscReg(IPR_CC) : curTick();
             }}, IsUnverifiable);
 
             // All of the barrier instructions below do nothing in
@@ -805,14 +805,14 @@ decode OPCODE default Unknown::unknown() {
             0x4400: wmb({{ }}, IsWriteBarrier, MemWriteOp);
         }
 
-        0xe000: decode FULL_SYSTEM {
+        0xe000: decode FullSystem {
             0: FailUnimpl::rc_se();
             default: BasicOperate::rc({{
                 Ra = IntrFlag;
                 IntrFlag = 0;
             }}, IsNonSpeculative, IsUnverifiable);
         }
-        0xf000: decode FULL_SYSTEM {
+        0xf000: decode FullSystem {
             0: FailUnimpl::rs_se();
             default: BasicOperate::rs({{
                 Ra = IntrFlag;
@@ -821,43 +821,41 @@ decode OPCODE default Unknown::unknown() {
         }
     }
 
-#if FULL_SYSTEM
-    0x00: CallPal::call_pal({{
-        if (!palValid ||
-            (palPriv
-             && xc->readMiscReg(IPR_ICM) != mode_kernel)) {
-            // invalid pal function code, or attempt to do privileged
-            // PAL call in non-kernel mode
-            fault = new UnimplementedOpcodeFault;
-        } else {
-            // check to see if simulator wants to do something special
-            // on this PAL call (including maybe suppress it)
-            bool dopal = xc->simPalCheck(palFunc);
-
-            if (dopal) {
-                xc->setMiscReg(IPR_EXC_ADDR, NPC);
-                NPC = xc->readMiscReg(IPR_PAL_BASE) + palOffset;
+    0x00: decode FullSystem {
+        0: decode PALFUNC {
+            format EmulatedCallPal {
+                0x00: halt ({{
+                    exitSimLoop("halt instruction encountered");
+                }}, IsNonSpeculative);
+                0x83: callsys({{
+                    xc->syscall(R0);
+                }}, IsSerializeAfter, IsNonSpeculative, IsSyscall);
+                // Read uniq reg into ABI return value register (r0)
+                0x9e: rduniq({{ R0 = Runiq; }}, IsIprAccess);
+                // Write uniq reg with value from ABI arg register (r16)
+                0x9f: wruniq({{ Runiq = R16; }}, IsIprAccess);
             }
         }
-    }}, IsNonSpeculative);
-#else
-    0x00: decode PALFUNC {
-        format EmulatedCallPal {
-            0x00: halt ({{
-                exitSimLoop("halt instruction encountered");
-            }}, IsNonSpeculative);
-            0x83: callsys({{
-                xc->syscall(R0);
-            }}, IsSerializeAfter, IsNonSpeculative, IsSyscall);
-            // Read uniq reg into ABI return value register (r0)
-            0x9e: rduniq({{ R0 = Runiq; }}, IsIprAccess);
-            // Write uniq reg with value from ABI arg register (r16)
-            0x9f: wruniq({{ Runiq = R16; }}, IsIprAccess);
-        }
+        default: CallPal::call_pal({{
+            if (!palValid ||
+                (palPriv
+                 && xc->readMiscReg(IPR_ICM) != mode_kernel)) {
+                // invalid pal function code, or attempt to do privileged
+                // PAL call in non-kernel mode
+                fault = new UnimplementedOpcodeFault;
+            } else {
+                // check to see if simulator wants to do something special
+                // on this PAL call (including maybe suppress it)
+                bool dopal = xc->simPalCheck(palFunc);
+
+                if (dopal) {
+                    xc->setMiscReg(IPR_EXC_ADDR, NPC);
+                    NPC = xc->readMiscReg(IPR_PAL_BASE) + palOffset;
+                }
+            }
+        }}, IsNonSpeculative);
     }
-#endif
 
-#if FULL_SYSTEM
     0x1b: decode PALMODE {
         0: OpcdecFault::hw_st_quad();
         1: decode HW_LDST_QUAD {
@@ -924,8 +922,6 @@ decode OPCODE default Unknown::unknown() {
         }
     }
 
-#endif
-
     format BasicOperate {
         // M5 special opcodes use the reserved 0x01 opcode space
         0x01: decode M5FUNC {
diff --git a/src/arch/alpha/isa/fp.isa b/src/arch/alpha/isa/fp.isa
index e3a6b18ab..5821ebcc5 100644
--- a/src/arch/alpha/isa/fp.isa
+++ b/src/arch/alpha/isa/fp.isa
@@ -45,7 +45,7 @@ output exec {{
     inline Fault checkFpEnableFault(%(CPU_exec_context)s *xc)
     {
         Fault fault = NoFault;  // dummy... this ipr access should not fault
-        if (FULL_SYSTEM && !ICSR_FPE(xc->readMiscReg(IPR_ICSR))) {
+        if (FullSystem && !ICSR_FPE(xc->readMiscReg(IPR_ICSR))) {
             fault = new FloatEnableFault;
         }
         return fault;
diff --git a/src/arch/alpha/isa/main.isa b/src/arch/alpha/isa/main.isa
index 796c5e38e..e87a184c3 100644
--- a/src/arch/alpha/isa/main.isa
+++ b/src/arch/alpha/isa/main.isa
@@ -64,6 +64,7 @@ output decoder {{
 #include "config/ss_compatible_fp.hh"
 #include "cpu/thread_context.hh"  // for Jump::branchTarget()
 #include "mem/packet.hh"
+#include "sim/full_system.hh"
 
 using namespace AlphaISA;
 }};
@@ -81,6 +82,7 @@ output exec {{
 #include "cpu/exetrace.hh"
 #include "mem/packet.hh"
 #include "mem/packet_access.hh"
+#include "sim/full_system.hh"
 #include "sim/pseudo_inst.hh"
 #include "sim/sim_exit.hh"