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-rw-r--r--src/arch/alpha/regfile.hh16
1 files changed, 8 insertions, 8 deletions
diff --git a/src/arch/alpha/regfile.hh b/src/arch/alpha/regfile.hh
index 54372da36..b93707181 100644
--- a/src/arch/alpha/regfile.hh
+++ b/src/arch/alpha/regfile.hh
@@ -106,25 +106,25 @@ namespace AlphaISA
miscRegFile.clear();
}
- MiscReg readMiscReg(int miscReg)
+ MiscReg readMiscRegNoEffect(int miscReg)
{
- return miscRegFile.readReg(miscReg);
+ return miscRegFile.readRegNoEffect(miscReg);
}
- MiscReg readMiscRegWithEffect(int miscReg, ThreadContext *tc)
+ MiscReg readMiscReg(int miscReg, ThreadContext *tc)
{
- return miscRegFile.readRegWithEffect(miscReg, tc);
+ return miscRegFile.readReg(miscReg, tc);
}
- void setMiscReg(int miscReg, const MiscReg &val)
+ void setMiscRegNoEffect(int miscReg, const MiscReg &val)
{
- miscRegFile.setReg(miscReg, val);
+ miscRegFile.setRegNoEffect(miscReg, val);
}
- void setMiscRegWithEffect(int miscReg, const MiscReg &val,
+ void setMiscReg(int miscReg, const MiscReg &val,
ThreadContext * tc)
{
- miscRegFile.setRegWithEffect(miscReg, val, tc);
+ miscRegFile.setReg(miscReg, val, tc);
}
FloatReg readFloatReg(int floatReg)