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-rw-r--r--src/arch/alpha/tlb.cc2
1 files changed, 1 insertions, 1 deletions
diff --git a/src/arch/alpha/tlb.cc b/src/arch/alpha/tlb.cc
index 2e974effe..77bf5e285 100644
--- a/src/arch/alpha/tlb.cc
+++ b/src/arch/alpha/tlb.cc
@@ -58,7 +58,7 @@ bool uncacheBit40 = false;
#define MODE2MASK(X) (1 << (X))
TLB::TLB(const Params *p)
- : SimObject(p), size(p->size), nlu(0)
+ : BaseTLB(p), size(p->size), nlu(0)
{
table = new TlbEntry[size];
memset(table, 0, sizeof(TlbEntry[size]));