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-rw-r--r--src/arch/alpha/tlb.cc7
-rw-r--r--src/arch/alpha/tlb.hh4
2 files changed, 11 insertions, 0 deletions
diff --git a/src/arch/alpha/tlb.cc b/src/arch/alpha/tlb.cc
index f1199b9b6..1d18c8d39 100644
--- a/src/arch/alpha/tlb.cc
+++ b/src/arch/alpha/tlb.cc
@@ -600,6 +600,13 @@ TLB::translateTiming(RequestPtr req, ThreadContext *tc,
translation->finish(translateAtomic(req, tc, mode), req, tc, mode);
}
+Fault
+TLB::translateFunctional(RequestPtr req, ThreadContext *tc, Mode mode)
+{
+ panic("Not implemented\n");
+ return NoFault;
+}
+
} // namespace AlphaISA
AlphaISA::TLB *
diff --git a/src/arch/alpha/tlb.hh b/src/arch/alpha/tlb.hh
index 1d4b6c6f8..4e56100c7 100644
--- a/src/arch/alpha/tlb.hh
+++ b/src/arch/alpha/tlb.hh
@@ -144,6 +144,10 @@ class TLB : public BaseTLB
Fault translateAtomic(RequestPtr req, ThreadContext *tc, Mode mode);
void translateTiming(RequestPtr req, ThreadContext *tc,
Translation *translation, Mode mode);
+ /**
+ * translateFunctional stub function for future CheckerCPU support
+ */
+ Fault translateFunctional(RequestPtr req, ThreadContext *tc, Mode mode);
};
} // namespace AlphaISA