diff options
Diffstat (limited to 'src/arch/alpha')
| -rw-r--r-- | src/arch/alpha/isa/fp.isa | 2 | ||||
| -rw-r--r-- | src/arch/alpha/locked_mem.hh | 10 |
2 files changed, 6 insertions, 6 deletions
diff --git a/src/arch/alpha/isa/fp.isa b/src/arch/alpha/isa/fp.isa index ed04d2a50..f9abd9b68 100644 --- a/src/arch/alpha/isa/fp.isa +++ b/src/arch/alpha/isa/fp.isa @@ -229,7 +229,7 @@ def template FloatingPointExecute {{ %(code)s; } else { m5_fesetround(getC99RoundingMode( - xc->readMiscRegNoEffect(MISCREG_FPCR))); + xc->readMiscReg(MISCREG_FPCR))); %(code)s; m5_fesetround(M5_FE_TONEAREST); } diff --git a/src/arch/alpha/locked_mem.hh b/src/arch/alpha/locked_mem.hh index 86958e4c5..24d028b54 100644 --- a/src/arch/alpha/locked_mem.hh +++ b/src/arch/alpha/locked_mem.hh @@ -55,8 +55,8 @@ template <class XC> inline void handleLockedRead(XC *xc, Request *req) { - xc->setMiscRegNoEffect(MISCREG_LOCKADDR, req->getPaddr() & ~0xf); - xc->setMiscRegNoEffect(MISCREG_LOCKFLAG, true); + xc->setMiscReg(MISCREG_LOCKADDR, req->getPaddr() & ~0xf); + xc->setMiscReg(MISCREG_LOCKFLAG, true); } @@ -70,13 +70,13 @@ handleLockedWrite(XC *xc, Request *req) req->setExtraData(2); } else { // standard store conditional - bool lock_flag = xc->readMiscRegNoEffect(MISCREG_LOCKFLAG); - Addr lock_addr = xc->readMiscRegNoEffect(MISCREG_LOCKADDR); + bool lock_flag = xc->readMiscReg(MISCREG_LOCKFLAG); + Addr lock_addr = xc->readMiscReg(MISCREG_LOCKADDR); if (!lock_flag || (req->getPaddr() & ~0xf) != lock_addr) { // Lock flag not set or addr mismatch in CPU; // don't even bother sending to memory system req->setExtraData(0); - xc->setMiscRegNoEffect(MISCREG_LOCKFLAG, false); + xc->setMiscReg(MISCREG_LOCKFLAG, false); // the rest of this code is not architectural; // it's just a debugging aid to help detect // livelock by warning on long sequences of failed |