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-rw-r--r--src/arch/alpha/ev5.cc4
-rw-r--r--src/arch/alpha/idle_event.cc2
-rw-r--r--src/arch/alpha/interrupts.hh2
-rw-r--r--src/arch/alpha/linux/threadinfo.hh4
-rw-r--r--src/arch/alpha/regfile.cc2
-rw-r--r--src/arch/alpha/remote_gdb.cc26
-rw-r--r--src/arch/alpha/stacktrace.cc2
-rw-r--r--src/arch/alpha/stacktrace.hh2
-rw-r--r--src/arch/alpha/tru64/process.cc2
9 files changed, 23 insertions, 23 deletions
diff --git a/src/arch/alpha/ev5.cc b/src/arch/alpha/ev5.cc
index 83900349e..45d2ff5a5 100644
--- a/src/arch/alpha/ev5.cc
+++ b/src/arch/alpha/ev5.cc
@@ -383,10 +383,10 @@ AlphaISA::MiscRegFile::setIpr(int idx, uint64_t val, ThreadContext *tc)
#if FULL_SYSTEM
if (val & 0x18) {
if (tc->getKernelStats())
- tc->getKernelStats()->mode(TheISA::Kernel::user, tc);
+ tc->getKernelStats()->mode(AlphaISA::Kernel::user, tc);
} else {
if (tc->getKernelStats())
- tc->getKernelStats()->mode(TheISA::Kernel::kernel, tc);
+ tc->getKernelStats()->mode(AlphaISA::Kernel::kernel, tc);
}
#endif
diff --git a/src/arch/alpha/idle_event.cc b/src/arch/alpha/idle_event.cc
index f0f1eab7a..d3807a48d 100644
--- a/src/arch/alpha/idle_event.cc
+++ b/src/arch/alpha/idle_event.cc
@@ -33,7 +33,7 @@
#include "arch/alpha/kernel_stats.hh"
#include "cpu/thread_context.hh"
-using namespace TheISA;
+using namespace AlphaISA;
void
IdleStartEvent::process(ThreadContext *tc)
diff --git a/src/arch/alpha/interrupts.hh b/src/arch/alpha/interrupts.hh
index 009b41637..1d8ba736f 100644
--- a/src/arch/alpha/interrupts.hh
+++ b/src/arch/alpha/interrupts.hh
@@ -78,7 +78,7 @@ class Interrupts
{
DPRINTF(Interrupt, "Interrupt %d:%d cleared\n", int_num, index);
- if (int_num < 0 || int_num >= TheISA::NumInterruptLevels)
+ if (int_num < 0 || int_num >= AlphaISA::NumInterruptLevels)
panic("int_num out of bounds\n");
if (index < 0 || index >= (int)sizeof(uint64_t) * 8)
diff --git a/src/arch/alpha/linux/threadinfo.hh b/src/arch/alpha/linux/threadinfo.hh
index b0c8284be..3ec1aa098 100644
--- a/src/arch/alpha/linux/threadinfo.hh
+++ b/src/arch/alpha/linux/threadinfo.hh
@@ -55,7 +55,7 @@ class ThreadInfo
CopyOut(tc, &data, addr, sizeof(T));
- data = TheISA::gtoh(data);
+ data = AlphaISA::gtoh(data);
return true;
}
@@ -76,7 +76,7 @@ class ThreadInfo
Addr sp;
if (!addr)
- addr = tc->readMiscRegNoEffect(TheISA::IPR_PALtemp23);
+ addr = tc->readMiscRegNoEffect(AlphaISA::IPR_PALtemp23);
FunctionalPort *p = tc->getPhysPort();
p->readBlob(addr, (uint8_t *)&sp, sizeof(Addr));
diff --git a/src/arch/alpha/regfile.cc b/src/arch/alpha/regfile.cc
index 2653310d7..3faa189ca 100644
--- a/src/arch/alpha/regfile.cc
+++ b/src/arch/alpha/regfile.cc
@@ -70,7 +70,7 @@ namespace AlphaISA
}
// Then loop through the floating point registers.
- for (int i = 0; i < TheISA::NumFloatRegs; ++i) {
+ for (int i = 0; i < AlphaISA::NumFloatRegs; ++i) {
dest->setFloatRegBits(i, src->readFloatRegBits(i));
}
diff --git a/src/arch/alpha/remote_gdb.cc b/src/arch/alpha/remote_gdb.cc
index 8d70ebfa2..a40d06f18 100644
--- a/src/arch/alpha/remote_gdb.cc
+++ b/src/arch/alpha/remote_gdb.cc
@@ -140,7 +140,7 @@
#include "sim/system.hh"
using namespace std;
-using namespace TheISA;
+using namespace AlphaISA;
RemoteGDB::RemoteGDB(System *_system, ThreadContext *c)
: BaseRemoteGDB(_system, c, KGDB_NUMREGS)
@@ -161,12 +161,12 @@ RemoteGDB::acc(Addr va, size_t len)
#else
Addr last_va;
- va = TheISA::TruncPage(va);
- last_va = TheISA::RoundPage(va + len);
+ va = AlphaISA::TruncPage(va);
+ last_va = AlphaISA::RoundPage(va + len);
do {
- if (TheISA::IsK0Seg(va)) {
- if (va < (TheISA::K0SegBase + pmem->size())) {
+ if (AlphaISA::IsK0Seg(va)) {
+ if (va < (AlphaISA::K0SegBase + pmem->size())) {
DPRINTF(GDBAcc, "acc: Mapping is valid K0SEG <= "
"%#x < K0SEG + size\n", va);
return true;
@@ -188,12 +188,12 @@ RemoteGDB::acc(Addr va, size_t len)
return true;
Addr ptbr = context->readMiscRegNoEffect(AlphaISA::IPR_PALtemp20);
- TheISA::PageTableEntry pte = TheISA::kernel_pte_lookup(context->getPhysPort(), ptbr, va);
+ AlphaISA::PageTableEntry pte = AlphaISA::kernel_pte_lookup(context->getPhysPort(), ptbr, va);
if (!pte.valid()) {
DPRINTF(GDBAcc, "acc: %#x pte is invalid\n", va);
return false;
}
- va += TheISA::PageBytes;
+ va += AlphaISA::PageBytes;
} while (va < last_va);
DPRINTF(GDBAcc, "acc: %#x mapping is valid\n", va);
@@ -215,17 +215,17 @@ RemoteGDB::getregs()
// @todo: Currently this is very Alpha specific.
if (AlphaISA::PcPAL(gdbregs.regs[KGDB_REG_PC])) {
- for (int i = 0; i < TheISA::NumIntArchRegs; ++i) {
+ for (int i = 0; i < AlphaISA::NumIntArchRegs; ++i) {
gdbregs.regs[i] = context->readIntReg(AlphaISA::reg_redir[i]);
}
} else {
- for (int i = 0; i < TheISA::NumIntArchRegs; ++i) {
+ for (int i = 0; i < AlphaISA::NumIntArchRegs; ++i) {
gdbregs.regs[i] = context->readIntReg(i);
}
}
#ifdef KGDB_FP_REGS
- for (int i = 0; i < TheISA::NumFloatArchRegs; ++i) {
+ for (int i = 0; i < AlphaISA::NumFloatArchRegs; ++i) {
gdbregs.regs[i + KGDB_REG_F0] = context->readFloatRegBits(i);
}
#endif
@@ -242,17 +242,17 @@ RemoteGDB::setregs()
{
// @todo: Currently this is very Alpha specific.
if (AlphaISA::PcPAL(gdbregs.regs[KGDB_REG_PC])) {
- for (int i = 0; i < TheISA::NumIntArchRegs; ++i) {
+ for (int i = 0; i < AlphaISA::NumIntArchRegs; ++i) {
context->setIntReg(AlphaISA::reg_redir[i], gdbregs.regs[i]);
}
} else {
- for (int i = 0; i < TheISA::NumIntArchRegs; ++i) {
+ for (int i = 0; i < AlphaISA::NumIntArchRegs; ++i) {
context->setIntReg(i, gdbregs.regs[i]);
}
}
#ifdef KGDB_FP_REGS
- for (int i = 0; i < TheISA::NumFloatArchRegs; ++i) {
+ for (int i = 0; i < AlphaISA::NumFloatArchRegs; ++i) {
context->setFloatRegBits(i, gdbregs.regs[i + KGDB_REG_F0]);
}
#endif
diff --git a/src/arch/alpha/stacktrace.cc b/src/arch/alpha/stacktrace.cc
index 124949781..b2fa89cb8 100644
--- a/src/arch/alpha/stacktrace.cc
+++ b/src/arch/alpha/stacktrace.cc
@@ -159,7 +159,7 @@ namespace AlphaISA
}
SymbolTable *symtab = tc->getSystemPtr()->kernelSymtab;
- Addr ksp = tc->readIntReg(TheISA::StackPointerReg);
+ Addr ksp = tc->readIntReg(AlphaISA::StackPointerReg);
Addr bottom = ksp & ~0x3fff;
Addr addr;
diff --git a/src/arch/alpha/stacktrace.hh b/src/arch/alpha/stacktrace.hh
index 834abbc2f..c028afe2b 100644
--- a/src/arch/alpha/stacktrace.hh
+++ b/src/arch/alpha/stacktrace.hh
@@ -62,7 +62,7 @@ namespace AlphaISA
class StackTrace
{
protected:
- typedef TheISA::MachInst MachInst;
+ typedef AlphaISA::MachInst MachInst;
private:
ThreadContext *tc;
std::vector<Addr> stack;
diff --git a/src/arch/alpha/tru64/process.cc b/src/arch/alpha/tru64/process.cc
index 5f448489e..455a24584 100644
--- a/src/arch/alpha/tru64/process.cc
+++ b/src/arch/alpha/tru64/process.cc
@@ -166,7 +166,7 @@ SyscallReturn tableFunc(SyscallDesc *desc, int callnum, LiveProcess *process,
ThreadContext *tc)
{
using namespace std;
- using namespace TheISA;
+ using namespace AlphaISA;
int id = tc->getSyscallArg(0); // table ID
int index = tc->getSyscallArg(1); // index into table
generated by cgit v1.2.3 (git 2.25.1) at 2024-08-26 07:11:06 +0000