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-rw-r--r--src/arch/alpha/ev5.cc7
-rw-r--r--src/arch/alpha/utility.hh2
2 files changed, 4 insertions, 5 deletions
diff --git a/src/arch/alpha/ev5.cc b/src/arch/alpha/ev5.cc
index 29910caa6..4e2420dc9 100644
--- a/src/arch/alpha/ev5.cc
+++ b/src/arch/alpha/ev5.cc
@@ -73,11 +73,12 @@ initCPU(ThreadContext *tc, int cpuId)
tc->setIntReg(16, cpuId);
tc->setIntReg(0, cpuId);
- AlphaFault *reset = new ResetFault;
+ Addr base = tc->readMiscRegNoEffect(IPR_PAL_BASE);
+ Addr offset = ResetFault().vect();
- tc->pcState(tc->readMiscRegNoEffect(IPR_PAL_BASE) + reset->vect());
+ tc->pcState(base + offset);
- delete reset;
+ tc->activate();
}
////////////////////////////////////////////////////////////////////////
diff --git a/src/arch/alpha/utility.hh b/src/arch/alpha/utility.hh
index 46af1217e..a0f70a331 100644
--- a/src/arch/alpha/utility.hh
+++ b/src/arch/alpha/utility.hh
@@ -60,8 +60,6 @@ inUserMode(ThreadContext *tc)
// Alpha IPR register accessors
inline bool PcPAL(Addr addr) { return addr & 0x3; }
-inline void startupCPU(ThreadContext *tc, int cpuId)
-{ tc->activate(); }
////////////////////////////////////////////////////////////////////////
//