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-rw-r--r--src/arch/arm/ArmISA.py2
1 files changed, 2 insertions, 0 deletions
diff --git a/src/arch/arm/ArmISA.py b/src/arch/arm/ArmISA.py
index 78dd04330..52c42cb95 100644
--- a/src/arch/arm/ArmISA.py
+++ b/src/arch/arm/ArmISA.py
@@ -111,6 +111,8 @@ class ArmISA(SimObject):
# Reserved for future expansion
id_aa64mmfr1_el1 = Param.UInt64(0x0000000000000000,
"AArch64 Memory Model Feature Register 1")
+ id_aa64mmfr2_el1 = Param.UInt64(0x0000000000000000,
+ "AArch64 Memory Model Feature Register 2")
# Any access (read/write) to an unimplemented
# Implementation Defined registers is not causing an Undefined Instruction.